Searched refs:PANEL_DISPLAY_CTRL (Results 1 – 4 of 4) sorted by relevance
14 reg = PANEL_DISPLAY_CTRL; in set_display_control()71 !(peek32(PANEL_DISPLAY_CTRL) & DISPLAY_CTRL_TIMING)) in primary_wait_vertical_sync()92 reg = peek32(PANEL_DISPLAY_CTRL); in sw_panel_power_sequence()94 poke32(PANEL_DISPLAY_CTRL, reg); in sw_panel_power_sequence()97 reg = peek32(PANEL_DISPLAY_CTRL); in sw_panel_power_sequence()99 poke32(PANEL_DISPLAY_CTRL, reg); in sw_panel_power_sequence()102 reg = peek32(PANEL_DISPLAY_CTRL); in sw_panel_power_sequence()104 poke32(PANEL_DISPLAY_CTRL, reg); in sw_panel_power_sequence()107 reg = peek32(PANEL_DISPLAY_CTRL); in sw_panel_power_sequence()109 poke32(PANEL_DISPLAY_CTRL, reg); in sw_panel_power_sequence()[all …]
181 reg = (peek32(PANEL_DISPLAY_CTRL) & ~reserved) & in program_mode_registers()194 poke32(PANEL_DISPLAY_CTRL, tmp | reg); in program_mode_registers()196 while ((peek32(PANEL_DISPLAY_CTRL) & ~reserved) != in program_mode_registers()201 poke32(PANEL_DISPLAY_CTRL, tmp | reg); in program_mode_registers()
133 val = peek32(PANEL_DISPLAY_CTRL) & in hw_sm750_inithw()146 poke32(PANEL_DISPLAY_CTRL, val); in hw_sm750_inithw()347 reg = peek32(PANEL_DISPLAY_CTRL); in hw_sm750_crtc_set_mode()348 poke32(PANEL_DISPLAY_CTRL, reg | (var->bits_per_pixel >> 4)); in hw_sm750_crtc_set_mode()467 unsigned int val = peek32(PANEL_DISPLAY_CTRL); in hw_sm750_set_blank()471 poke32(PANEL_DISPLAY_CTRL, val); in hw_sm750_set_blank()
536 #define PANEL_DISPLAY_CTRL 0x080000 macro