Searched refs:PACKET3_PREAMBLE_END_CLEAR_STATE (Results 1 – 14 of 14) sorted by relevance
270 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
394 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
345 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
518 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
396 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
3665 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v11_0_cp_gfx_start()
6414 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v10_0_cp_gfx_start()
1263 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1777 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1855 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1658 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1559 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cayman_cp_start()
3579 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in si_cp_start()5749 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in si_get_csb_buffer()
4007 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cik_cp_gfx_start()6758 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in cik_get_csb_buffer()