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Searched refs:PACKET3_PREAMBLE_END_CLEAR_STATE (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/ !
H A Dvid.h270 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dcikd.h394 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dsoc15d.h345 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dsid.h518 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dnvd.h396 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dgfx_v11_0.c3665 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v11_0_cp_gfx_start()
H A Dgfx_v10_0.c6414 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v10_0_cp_gfx_start()
/linux/drivers/gpu/drm/radeon/ !
H A Dnid.h1263 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dsid.h1777 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dcikd.h1855 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Devergreend.h1658 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
H A Dni.c1559 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cayman_cp_start()
H A Dsi.c3579 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in si_cp_start()
5749 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in si_get_csb_buffer()
H A Dcik.c4007 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cik_cp_gfx_start()
6758 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in cik_get_csb_buffer()