Searched refs:PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (Results 1 – 14 of 14) sorted by relevance
269 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
393 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
344 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
517 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
395 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
3638 amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v11_0_cp_gfx_start()
6387 amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in gfx_v10_0_cp_gfx_start()
1262 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
1776 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
1854 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
1657 # define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE (2 << 28) macro
1553 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in cayman_cp_start()
3573 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in si_cp_start()5707 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in si_get_csb_buffer()
3997 radeon_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in cik_cp_gfx_start()6711 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE); in cik_get_csb_buffer()