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Searched refs:OUT_RING (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/msm/adreno/
H A Da2xx_gpu.c30 OUT_RING(ring, lower_32_bits(submit->cmd[i].iova)); in a2xx_submit()
31 OUT_RING(ring, submit->cmd[i].size); in a2xx_submit()
38 OUT_RING(ring, submit->seqno); in a2xx_submit()
42 OUT_RING(ring, 0x00000000); in a2xx_submit()
45 OUT_RING(ring, CACHE_FLUSH_TS); in a2xx_submit()
46 OUT_RING(ring, rbmemptr(ring, fence)); in a2xx_submit()
47 OUT_RING(ring, submit->seqno); in a2xx_submit()
49 OUT_RING(ring, 0x80000000); in a2xx_submit()
63 OUT_RING(ring, 0x000003ff); in a2xx_me_init()
65 OUT_RING(ring, 0x00000000); in a2xx_me_init()
[all …]
H A Da6xx_gpu.c155 OUT_RING(ring, lower_32_bits(shadowptr(a6xx_gpu, ring))); in update_shadow_rptr()
156 OUT_RING(ring, upper_32_bits(shadowptr(a6xx_gpu, ring))); in update_shadow_rptr()
194 OUT_RING(ring, CP_REG_TO_MEM_0_REG(counter) | in get_stats_counter()
197 OUT_RING(ring, lower_32_bits(iova)); in get_stats_counter()
198 OUT_RING(ring, upper_32_bits(iova)); in get_stats_counter()
221 OUT_RING(ring, 0); in a6xx_set_pagetable()
222 OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence))); in a6xx_set_pagetable()
223 OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence))); in a6xx_set_pagetable()
224 OUT_RING(ring, submit->seqno - 1); in a6xx_set_pagetable()
227 OUT_RING(ring, CP_THREAD_CONTROL_0_SYNC_THREADS | CP_SET_THREAD_BOTH); in a6xx_set_pagetable()
[all …]
H A Da3xx_gpu.c48 OUT_RING(ring, lower_32_bits(submit->cmd[i].iova)); in a3xx_submit()
49 OUT_RING(ring, submit->cmd[i].size); in a3xx_submit()
56 OUT_RING(ring, submit->seqno); in a3xx_submit()
63 OUT_RING(ring, HLSQ_FLUSH); in a3xx_submit()
67 OUT_RING(ring, 0x00000000); in a3xx_submit()
71 OUT_RING(ring, CACHE_FLUSH_TS | CP_EVENT_WRITE_0_IRQ); in a3xx_submit()
72 OUT_RING(ring, rbmemptr(ring, fence)); in a3xx_submit()
73 OUT_RING(ring, submit->seqno); in a3xx_submit()
78 OUT_RING(ring, CP_REG(REG_A3XX_HLSQ_CL_KERNEL_GROUP_X_REG)); in a3xx_submit()
79 OUT_RING(ring, 0x00000000); in a3xx_submit()
[all …]
H A Da4xx_gpu.c42 OUT_RING(ring, lower_32_bits(submit->cmd[i].iova)); in a4xx_submit()
43 OUT_RING(ring, submit->cmd[i].size); in a4xx_submit()
50 OUT_RING(ring, submit->seqno); in a4xx_submit()
57 OUT_RING(ring, HLSQ_FLUSH); in a4xx_submit()
61 OUT_RING(ring, 0x00000000); in a4xx_submit()
65 OUT_RING(ring, CACHE_FLUSH_TS | CP_EVENT_WRITE_0_IRQ); in a4xx_submit()
66 OUT_RING(ring, rbmemptr(ring, fence)); in a4xx_submit()
67 OUT_RING(ring, submit->seqno); in a4xx_submit()
161 OUT_RING(ring, 0x000003f7); in a4xx_me_init()
162 OUT_RING(ring, 0x00000000); in a4xx_me_init()
[all …]
H A Da5xx_gpu.c28 OUT_RING(ring, lower_32_bits(shadowptr(a5xx_gpu, ring))); in update_shadow_rptr()
29 OUT_RING(ring, upper_32_bits(shadowptr(a5xx_gpu, ring))); in update_shadow_rptr()
105 OUT_RING(ring, ptr[i]); in a5xx_submit_in_rb()
143 OUT_RING(ring, 0x02); in a5xx_submit()
147 OUT_RING(ring, 0); in a5xx_submit()
151 OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[submit->ring->id])); in a5xx_submit()
152 OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[submit->ring->id])); in a5xx_submit()
156 OUT_RING(ring, 1); in a5xx_submit()
164 OUT_RING(ring, 0x0); in a5xx_submit()
168 OUT_RING(ring, 0x02); in a5xx_submit()
[all …]
H A Da5xx_power.c231 OUT_RING(ring, 0); in a5xx_gpmu_init()
235 OUT_RING(ring, lower_32_bits(a5xx_gpu->gpmu_iova)); in a5xx_gpmu_init()
236 OUT_RING(ring, upper_32_bits(a5xx_gpu->gpmu_iova)); in a5xx_gpmu_init()
237 OUT_RING(ring, a5xx_gpu->gpmu_dwords); in a5xx_gpmu_init()
241 OUT_RING(ring, 1); in a5xx_gpmu_init()
H A Dadreno_gpu.h680 OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF)); in OUT_PKT0()
688 OUT_RING(ring, CP_TYPE2_PKT); in OUT_PKT2()
695 OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8)); in OUT_PKT3()
717 OUT_RING(ring, PKT4(regindx, cnt)); in OUT_PKT4()
728 OUT_RING(ring, PKT7(opcode, cnt)); in OUT_PKT7()
H A Da8xx_gpu.c396 OUT_RING(ring, BIT(27)); in a8xx_cp_init()
412 OUT_RING(ring, mask); in a8xx_cp_init()
415 OUT_RING(ring, 0x00000003); in a8xx_cp_init()
418 OUT_RING(ring, 0x20000000); in a8xx_cp_init()
421 OUT_RING(ring, 0x00000002); in a8xx_cp_init()
677 OUT_RING(gpu->rb[0], 0x00000000); in hw_init()
/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_dma.h77 OUT_RING(struct nouveau_channel *chan, int data) in OUT_RING() function
H A Dnouveau_dma.c114 OUT_RING(chan, chan->push.addr | 0x20000000); in nouveau_dma_wait()
/linux/drivers/gpu/drm/msm/
H A Dmsm_ringbuffer.h129 OUT_RING(struct msm_ringbuffer *ring, uint32_t data) in OUT_RING() function