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Searched refs:NvU64 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/
H A Dgsp.h18 NV_DECLARE_ALIGNED(NvU64 base, 8);
19 NV_DECLARE_ALIGNED(NvU64 limit, 8);
20 NV_DECLARE_ALIGNED(NvU64 reserved, 8);
62 NV_DECLARE_ALIGNED(NvU64 FirstVFBar0Address, 8);
63 NV_DECLARE_ALIGNED(NvU64 FirstVFBar1Address, 8);
64 NV_DECLARE_ALIGNED(NvU64 FirstVFBar2Address, 8);
65 NV_DECLARE_ALIGNED(NvU64 bar0Size, 8);
66 NV_DECLARE_ALIGNED(NvU64 bar1Size, 8);
67 NV_DECLARE_ALIGNED(NvU64 bar2Size, 8);
111 NvU64 nonWprHeapOffset;
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H A Dfifo.h14 NV_DECLARE_ALIGNED(NvU64 base, 8);
15 NV_DECLARE_ALIGNED(NvU64 size, 8);
28 NV_DECLARE_ALIGNED(NvU64 gpFifoOffset, 8); // offset to beginning of GP FIFO
41 NV_DECLARE_ALIGNED(NvU64 userdOffset[NV_MAX_SUBDEVICES], 8);
H A Dfbsr.h16 NV_DECLARE_ALIGNED(NvU64 sysmemAddrOfSuspendResumeData, 8);
H A Ddisp.h301 NV_DECLARE_ALIGNED(NvU64 physicalAddr, 8);
302 NV_DECLARE_ALIGNED(NvU64 limit, 8);
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/
H A Dgsp.h18 NV_DECLARE_ALIGNED(NvU64 base, 8);
19 NV_DECLARE_ALIGNED(NvU64 limit, 8);
20 NV_DECLARE_ALIGNED(NvU64 reserved, 8);
81 NV_DECLARE_ALIGNED(NvU64 FirstVFBar0Address, 8);
82 NV_DECLARE_ALIGNED(NvU64 FirstVFBar1Address, 8);
83 NV_DECLARE_ALIGNED(NvU64 FirstVFBar2Address, 8);
84 NV_DECLARE_ALIGNED(NvU64 bar0Size, 8);
85 NV_DECLARE_ALIGNED(NvU64 bar1Size, 8);
86 NV_DECLARE_ALIGNED(NvU64 bar2Size, 8);
162 NvU64 fb_length;
[all …]
H A Dvmm.h17 NvU64 vaSize NV_ALIGN_BYTES(8);
18 NvU64 vaStartInternal NV_ALIGN_BYTES(8);
19 NvU64 vaLimitInternal NV_ALIGN_BYTES(8);
21 NvU64 vaBase NV_ALIGN_BYTES(8);
51 NV_DECLARE_ALIGNED(NvU64 pageSize, 8);
57 NV_DECLARE_ALIGNED(NvU64 virtAddrLo, 8);
63 NV_DECLARE_ALIGNED(NvU64 virtAddrHi, 8);
77 NV_DECLARE_ALIGNED(NvU64 physAddress, 8);
82 NV_DECLARE_ALIGNED(NvU64 size, 8);
100 NV_DECLARE_ALIGNED(NvU64 physAddress, 8);
H A Dfbsr.h66 NvU64 pte; // PTE when IDR==0; PDE when IDR > 0
67 NvU64 pde; // PTE when IDR==0; PDE when IDR > 0
80 NvU64 length NV_ALIGN_BYTES(8);
93 NV_DECLARE_ALIGNED(NvU64 gspFbAllocsSysOffset, 8);
102 NV_DECLARE_ALIGNED(NvU64 vidOffset, 8);
103 NV_DECLARE_ALIGNED(NvU64 sysOffset, 8);
104 NV_DECLARE_ALIGNED(NvU64 size, 8);
H A Dfifo.h150 NV_DECLARE_ALIGNED(NvU64 base, 8);
151 NV_DECLARE_ALIGNED(NvU64 size, 8);
164 NV_DECLARE_ALIGNED(NvU64 gpFifoOffset, 8); // offset to beginning of GP FIFO
177 NV_DECLARE_ALIGNED(NvU64 userdOffset[NV_MAX_SUBDEVICES], 8);
318 NV_DECLARE_ALIGNED(NvU64 gpuPhysAddr, 8);
319 NV_DECLARE_ALIGNED(NvU64 gpuVirtAddr, 8);
320 NV_DECLARE_ALIGNED(NvU64 size, 8);
335 NV_DECLARE_ALIGNED(NvU64 virtAddress, 8);
336 NV_DECLARE_ALIGNED(NvU64 size, 8);
H A Ddevice.h19 NV_DECLARE_ALIGNED(NvU64 vaSpaceSize, 8);
20 NV_DECLARE_ALIGNED(NvU64 vaStartInternal, 8);
21 NV_DECLARE_ALIGNED(NvU64 vaLimitInternal, 8);
H A Dbar.h21 NvU64 entryValue NV_ALIGN_BYTES(8);
22 NvU64 entryLevelShift NV_ALIGN_BYTES(8);
H A Ddisp.h13 NV_DECLARE_ALIGNED(NvU64 instMemPhysAddr, 8);
14 NV_DECLARE_ALIGNED(NvU64 instMemSize, 8);
98 NV_DECLARE_ALIGNED(NvU64 vbiosAddress, 8);
705 NV_DECLARE_ALIGNED(NvU64 physicalAddr, 8);
706 NV_DECLARE_ALIGNED(NvU64 limit, 8);
/linux/drivers/gpu/drm/nouveau/include/nvrm/
H A Dnvtypes.h13 typedef u64 NvU64; typedef
19 typedef NvU64 NvLength;
21 typedef NvU64 RmPhysAddr;
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fsp/
H A Dgh100.c42 NvU64 gspFmcSysmemOffset;
43 NvU64 frtsSysmemOffset;
47 NvU64 frtsVidmemOffset;
55 NvU64 gspBootArgsSysmemOffset;