Searched refs:MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 (Results 1 – 14 of 14) sorted by relevance
271 MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x1c3
750 #define MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x210 0x470 0x000 0x5 0x0 macro
521 MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x400001c2
434 MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x1e2
613 MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x400001c2
719 fsl,pins = <MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x80>;
583 MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x84 /* PCIe_SMCLK */
931 MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x400001c3
917 fsl,pins = <MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x80>; /* FAN RPM */
859 MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x1c3
824 MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x84
947 MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x84
1002 fsl,pins = <MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x400001c6>, /* SMARC S5 - I2C_CAM0_CK */
1179 <MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x400001c6>, /* SODIMM 95 */