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Searched refs:MPLL_AD_FUNC_CNTL (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Drv740d.h45 #define MPLL_AD_FUNC_CNTL 0x624 macro
H A Drv740_dpm.c303 RREG32(MPLL_AD_FUNC_CNTL); in rv740_read_clock_registers()
H A Drv770d.h118 #define MPLL_AD_FUNC_CNTL 0x624 macro
H A Dnid.h560 #define MPLL_AD_FUNC_CNTL 0x624 macro
H A Dsid.h623 #define MPLL_AD_FUNC_CNTL 0x2bc0 macro
H A Dcikd.h746 #define MPLL_AD_FUNC_CNTL 0x2bc0 macro
H A Devergreend.h98 #define MPLL_AD_FUNC_CNTL 0x624 macro
H A Drv770_dpm.c1533 RREG32(MPLL_AD_FUNC_CNTL); in rv770_read_clock_registers()
H A Dni_dpm.c1189 ni_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in ni_read_clock_registers()
H A Dsi_dpm.c3516 si_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); in si_read_clock_registers()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h226 #define MPLL_AD_FUNC_CNTL 0xAF0 macro
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c1083 /* MPLL_AD_FUNC_CNTL setup*/ in iceland_calculate_mclk_params()
1085 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
H A Dci_smumgr.c1060 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
H A Dtonga_smumgr.c832 /* MPLL_AD_FUNC_CNTL setup*/ in tonga_calculate_mclk_params()
834 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, in tonga_calculate_mclk_params()