Searched refs:MLX5_MATCH_MISC_PARAMETERS_2 (Results 1 – 15 of 15) sorted by relevance
113 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in parse_tunnel()
1750 MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_tc_ct_alloc_pre_ct()
104 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_ingress_vlan_proto_fg_create()166 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_ingress_vlan_proto_filter_fg_create()224 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_ingress_mac_fg_create()345 MLX5_SET(create_flow_group_in, in, match_criteria_enable, MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_egress_miss_fg_create()593 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_ingress_flow_with_esw_create()707 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_ingress_filter_flow_create()828 rule_spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_egress_miss_flow_create()
98 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_ipsec_rx_rule_add_match_obj()
345 MLX5_SET(create_flow_group_in, in, match_criteria_enable, MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_esw_bridge_mcast_filter_fg_create()523 rule_spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_esw_bridge_mcast_flow_with_esw_create()
194 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in ipsec_rx_rule_add_match_obj()233 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in rx_add_rule_drop_auth_trailer()311 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in rx_add_rule_drop_replay()420 MLX5_MATCH_MISC_PARAMETERS_2); in ipsec_rx_status_pass_group_create()471 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in ipsec_rx_status_pass_create()1617 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in setup_fte_reg_a()1628 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in setup_fte_reg_c4()1977 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in rx_add_rule_sa_selector()
125 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in accel_psp_setup_syndrome_match()
96 u8 match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2 | MLX5_MATCH_OUTER_HEADERS; in mlx5_ct_fs_hmfs_matcher_create()
100 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2 | MLX5_MATCH_OUTER_HEADERS; in mlx5_ct_fs_smfs_matcher_create()
84 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in mlx5e_int_port_create_rx_rule()
94 MLX5_MATCH_MISC_PARAMETERS_2); in mlx5e_post_meter_rate_fg_create()
298 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_MISC_PARAMETERS_2); in macsec_fs_tx_create_crypto_table_groups()513 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in macsec_fs_tx_create()590 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in macsec_fs_tx_setup_fte()1167 spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2; in macsec_fs_rx_create_check_decap_rule()2161 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_macsec_fs_add_roce_rule_rx()
385 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in mlx5_generate_ttc_rule()505 MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2); in mlx5_create_ttc_table_ipsec_groups()
1169 MLX5_MATCH_MISC_PARAMETERS_2 = 1 << 3, enumerator
228 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2; in mlx5e_tc_match_to_reg_match()