Home
last modified time | relevance | path

Searched refs:MLX5_CAP_ESW_FLOWTABLE (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/
H A Dofld.h22 MLX5_CAP_ESW_FLOWTABLE(esw->dev, egress_acl_forward_to_vport); in mlx5_esw_acl_egress_fwd2vport_supported()
/linux/include/linux/mlx5/
H A Ddevice.h1362 #define MLX5_CAP_ESW_FLOWTABLE(mdev, cap) \ macro
1367 MLX5_CAP_ESW_FLOWTABLE(mdev, flow_table_properties_nic_esw_fdb.cap)
1370 MLX5_CAP_ESW_FLOWTABLE(mdev, flow_table_properties_esw_acl_egress.cap)
1373 MLX5_CAP_ESW_FLOWTABLE(mdev, flow_table_properties_esw_acl_ingress.cap)
1376 MLX5_CAP_ESW_FLOWTABLE(mdev, ft_field_support_2_esw_fdb.cap)
/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Deswitch_offloads_termtbl.c202 if (MLX5_CAP_ESW_FLOWTABLE(esw->dev, flow_source)) in mlx5_eswitch_offload_is_uplink_port()
H A Deswitch_offloads.c88 if (!MLX5_CAP_ESW_FLOWTABLE(esw->dev, flow_source) || !attr || !attr->in_rep) in mlx5_eswitch_set_rule_flow_source()
1013 if (MLX5_CAP_ESW_FLOWTABLE(on_esw->dev, flow_source) && in mlx5_eswitch_add_send_to_vport_rule()
1078 return MLX5_CAP_ESW_FLOWTABLE(esw->dev, fdb_to_vport_reg_c_id) & in mlx5_eswitch_reg_c1_loopback_supported()
1533 (MLX5_CAP_ESW_FLOWTABLE((esw)->dev, fdb_modify_header_fwd_to_table))
1541 if (!MLX5_CAP_ESW_FLOWTABLE(dev, multi_fdb_encap) && in esw_init_chains_offload_flags()
3290 if (!(MLX5_CAP_ESW_FLOWTABLE(esw->dev, fdb_to_vport_reg_c_id) & in mlx5_esw_vport_match_metadata_supported()
H A Deswitch.h84 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table)
H A Den_tc.c1522 fwd_and_modify_cap = MLX5_CAP_ESW_FLOWTABLE((esw)->dev, fdb_modify_header_fwd_to_table); in mlx5e_tc_offload_to_slow_path()
/linux/drivers/net/ethernet/mellanox/mlx5/core/esw/
H A Dbridge.c760 if (MLX5_CAP_ESW_FLOWTABLE(bridge->br_offloads->esw->dev, flow_source) && in mlx5_esw_bridge_egress_flow_create()
1523 if (!(MLX5_CAP_ESW_FLOWTABLE((esw)->dev, fdb_multi_path_any_table) || in mlx5_esw_bridge_mcast_set()
1524 MLX5_CAP_ESW_FLOWTABLE((esw)->dev, fdb_multi_path_any_table_limit_regc)) || in mlx5_esw_bridge_mcast_set()
1525 !MLX5_CAP_ESW_FLOWTABLE((esw)->dev, fdb_uplink_hairpin) || in mlx5_esw_bridge_mcast_set()
/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/
H A Dtable.c36 if (!MLX5_CAP_ESW_FLOWTABLE(tbl->ctx->mdev, fdb_dynamic_tunnel)) { in hws_table_set_cap_attr()
/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/
H A Ddr_action.c61 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_any_table_limit_regc) || in mlx5dr_action_supp_fwd_fdb_multi_ft()
62 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_any_table)); in mlx5dr_action_supp_fwd_fdb_multi_ft()
649 if (!MLX5_CAP_ESW_FLOWTABLE(dmn->mdev, fdb_ipv4_ttl_modify)) { in dr_action_modify_ttl_adjust()
/linux/drivers/net/ethernet/mellanox/mlx5/core/en/
H A Dtc_ct.c497 if (dev && MLX5_CAP_ESW_FLOWTABLE(ct_priv->dev, flow_source)) in mlx5_tc_ct_set_tuple_match()
2148 if (!MLX5_CAP_ESW_FLOWTABLE(esw->dev, in mlx5_tc_ct_init_check_esw_support()