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Searched refs:MDIO_MMD_PMAPMD (Results 1 – 25 of 36) sorted by relevance

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/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dael1002.c118 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL_I2C_CTRL, in ael_i2c_rd()
125 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL_I2C_STAT, &stat); in ael_i2c_rd()
129 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AEL_I2C_DATA, in ael_i2c_rd()
145 err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, !!enable); in ael1002_power_down()
148 MDIO_MMD_PMAPMD, MDIO_CTRL1, in ael1002_power_down()
158 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL100X_TX_CONFIG1, 1)) || in ael1002_reset()
159 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_PWR_DOWN_HI, 0)) || in ael1002_reset()
160 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_PWR_DOWN_LO, 0)) || in ael1002_reset()
161 (err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AEL1002_XFI_EQL, 0x18)) || in ael1002_reset()
162 (err = t3_mdio_change_bits(phy, MDIO_MMD_PMAPMD, AEL1002_LB_E in ael1002_reset()
[all...]
H A Daq100x.c82 int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AQ_IMASK_PMA, IMASK_PMA); in aq100x_intr_enable()
100 t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v); in aq100x_intr_clear()
115 t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v); in aq100x_intr_handler()
123 MDIO_MMD_PMAPMD, MDIO_CTRL1, in aq100x_power_down()
197 MDIO_MMD_PMAPMD, MDIO_CTRL1, in aq100x_set_loopback()
214 err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AQ_LINK_STAT, &v); in aq100x_get_link_status()
/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dmv88x201x.c55 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_CTRL2, &led); in led_link()
59 cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_CTRL2, led); in led_link()
62 cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_CTRL2, led); in led_link()
79 cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL, in mv88x201x_interrupt_enable()
96 cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL, 0x0); in mv88x201x_interrupt_disable()
116 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_RXSTAT, &val); in mv88x201x_interrupt_clear()
117 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_TXSTAT, &val); in mv88x201x_interrupt_clear()
118 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT, &val); in mv88x201x_interrupt_clear()
123 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val); in mv88x201x_interrupt_clear()
127 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT in mv88x201x_interrupt_clear()
[all...]
H A Dmy3126.c47 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val); in my3126_interrupt_handler()
118 cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val); in my3126_get_link_status()
/linux/drivers/net/phy/
H A Dphy-c45.c23 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_baset1_able()
41 stat1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in genphy_c45_pma_can_sleep()
57 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in genphy_c45_pma_resume()
71 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in genphy_c45_pma_suspend()
101 return phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_PMD_BT1_CTRL, in genphy_c45_pma_baset1_setup_master_slave()
118 ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_pma_setup_forced()
122 ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2); in genphy_c45_pma_setup_forced()
168 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, ctrl1); in genphy_c45_pma_setup_forced()
172 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2, ctrl2); in genphy_c45_pma_setup_forced()
185 ret = phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_PMD_BT1_CTR in genphy_c45_pma_setup_forced()
[all...]
H A Dmarvell-88q2xxx.c150 { MDIO_MMD_PMAPMD, MDIO_CTRL1,
154 { MDIO_MMD_PMAPMD, MDIO_CTRL1, 0x0 },
181 { MDIO_MMD_PMAPMD, MDIO_CTRL1, 0x0840 },
187 { MDIO_MMD_PMAPMD, MDIO_CTRL1, 0x0840 },
198 { MDIO_MMD_PMAPMD, 0x0000, 0x0000 },
605 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in mv88q2xxx_suspend()
621 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in mv88q2xxx_resume()
897 bool is_rev_b1 = phydev->c45_ids.device_ids[MDIO_MMD_PMAPMD] == PHY_ID_88Q2220_REVB1; in mv88q222x_revb1_revb2_config_init()
921 if (phydev->c45_ids.device_ids[MDIO_MMD_PMAPMD] == PHY_ID_88Q2220_REVB0) in mv88q222x_config_init()
H A Dadin1100.c108 ret = phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_B10L_PMA_CTRL, in adin_config_aneg()
111 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_B10L_PMA_CTRL, in adin_config_aneg()
252 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT); in adin_get_features()
286 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in adin_get_sqi()
H A Dmicrochip_t1.c1344 {MDIO_MMD_PMAPMD, LAN887X_ZQCAL_CONTROL_1, 0x4008}, in lan887x_phy_setup()
1345 {MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL2, 0x0000}, in lan887x_phy_setup()
1346 {MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL6, 0x0040}, in lan887x_phy_setup()
1383 {MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL4, 0x00b8}, in lan887x_100M_setup()
1384 {MDIO_MMD_PMAPMD, LAN887X_TX_AMPLT_1000T1_REG, 0x0038}, in lan887x_100M_setup()
1391 {MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL4, 0x0038}, in lan887x_100M_setup()
1407 {MDIO_MMD_PMAPMD, LAN887X_TX_AMPLT_1000T1_REG, 0x003f}, in lan887x_1000M_setup()
1408 {MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL4, 0x00b8}, in lan887x_1000M_setup()
1417 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, LAN887X_DSP_PMA_CONTROL, in lan887x_1000M_setup()
1441 ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, LAN887X_DSP_PMA_CONTRO in lan887x_phy_reset()
[all...]
H A Dmarvell10g.c502 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_BOOT); in mv3310_probe()
518 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER0); in mv3310_probe()
524 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER1); in mv3310_probe()
585 return (phydev->c45_ids.device_ids[MDIO_MMD_PMAPMD] & in mv3310_has_pma_ngbaset_quirk()
593 mactype = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_21X0_PORT_CTRL); in mv2110_get_mactype()
605 err = phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_21X0_PORT_CTRL, in mv2110_set_mactype()
870 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in mv3310_get_features()
1270 if ((phydev->c45_ids.device_ids[MDIO_MMD_PMAPMD] & in mv3310_match_phy_device()
1280 if ((phydev->c45_ids.device_ids[MDIO_MMD_PMAPMD] & in mv3340_match_phy_device()
1291 if ((phydev->c45_ids.device_ids[MDIO_MMD_PMAPMD] in mv211x_match_phy_device()
[all...]
H A Dmarvell-88x2222.c63 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, in mv2222_tx_enable()
70 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, in mv2222_tx_disable()
416 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_RX_SIGNAL_DETECT); in mv2222_link_is_operational()
H A Dbcm87xx.c106 rx_signal_detect = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in bcm87xx_read_status()
H A Dbcm84881.c27 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in bcm84881_wait_init()
/linux/drivers/net/ethernet/sfc/falcon/
H A Dtenxpress.c155 ef4_mdio_set_flag(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_CTRL_REG, in tenxpress_init()
157 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG, in tenxpress_init()
230 reg = ef4_mdio_read(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG); in tenxpress_special_reset()
232 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg); in tenxpress_special_reset()
278 reg = ef4_mdio_read(efx, MDIO_MMD_PMAPMD, in sfx7101_check_bad_lp()
291 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, in sfx7101_check_bad_lp()
372 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg); in sfx7101_phy_fini()
408 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_LED_OVERR_REG, reg); in tenxpress_set_id_led()
H A Dtxc43128_phy.c186 int rc = ef4_mdio_reset_mmd(efx, MDIO_MMD_PMAPMD, in txc_reset_phy()
299 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, in txc_apply_defaults()
301 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, in txc_apply_defaults()
303 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, in txc_apply_defaults()
305 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, in txc_apply_defaults()
407 txc_analog_lane_power(efx, MDIO_MMD_PMAPMD); in txc_set_power()
478 ef4_mdio_write(efx, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_CTRL, 0); in txc43128_phy_fini()
H A Dqt202x_phy.c53 ef4_mdio_write(p, MDIO_MMD_PMAPMD, addr, mode); in falcon_qt202x_set_led()
204 ef4_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1, in qt2025c_bug17190_workaround()
207 ef4_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1, in qt2025c_bug17190_workaround()
415 &efx->mdio, efx->mdio.prtad, MDIO_MMD_PMAPMD, in qt202x_phy_reconfigure()
467 mmd = MDIO_MMD_PMAPMD; in qt202x_phy_get_module_eeprom()
H A Dmdio_10g.c180 ef4_mdio_set_flag(efx, MDIO_MMD_PMAPMD, in ef4_mdio_transmit_disable()
187 ef4_mdio_set_flag(efx, MDIO_MMD_PMAPMD, in ef4_mdio_phy_reconfigure()
/linux/drivers/net/
H A Dmdio.c112 if (devad == MDIO_MMD_PMAPMD || devad == MDIO_MMD_PCS || in mdio45_links_ok()
197 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD, in mdio45_ethtool_ksettings_get_npage()
206 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD, in mdio45_ethtool_ksettings_get_npage()
233 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD, in mdio45_ethtool_ksettings_get_npage()
241 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD, in mdio45_ethtool_ksettings_get_npage()
311 reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD, in mdio45_ethtool_ksettings_get_npage()
330 switch (mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD, in mdio45_ethtool_ksettings_get_npage()
/linux/drivers/net/pcs/
H A Dpcs-xpcs-wx.c51 return xpcs_write(xpcs, MDIO_MMD_PMAPMD, TXGBE_PMA_MMD + reg, val); in txgbe_write_pma()
56 return xpcs_modify(xpcs, MDIO_MMD_PMAPMD, TXGBE_PMA_MMD + reg, mask, in txgbe_modify_pma()
186 xpcs_modify(xpcs, MDIO_MMD_PMAPMD, MDIO_CTRL1, in txgbe_xpcs_switch_mode()
191 xpcs_write(xpcs, MDIO_MMD_PMAPMD, MDIO_CTRL1, 0); in txgbe_xpcs_switch_mode()
/linux/drivers/net/ethernet/aquantia/atlantic/
H A Daq_phy.c120 val = aq_phy_read_reg(aq_hw, MDIO_MMD_PMAPMD, 3); in aq_phy_init_phy_id()
141 dev_id = aq_phy_read_reg(aq_hw, MDIO_MMD_PMAPMD, 2); in aq_phy_init()
143 dev_id |= aq_phy_read_reg(aq_hw, MDIO_MMD_PMAPMD, 3); in aq_phy_init()
/linux/drivers/net/phy/qcom/
H A Dqca808x.c110 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_20DB, in qca808x_phy_fast_retrain_config()
112 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_17DB, in qca808x_phy_fast_retrain_config()
114 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_27DB, in qca808x_phy_fast_retrain_config()
116 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, QCA808X_PHY_MMD1_MSE_THRESHOLD_28DB, in qca808x_phy_fast_retrain_config()
419 MDIO_MMD_PMAPMD, QCA8081_PHY_SERDES_MMD1_FIFO_CTRL, in qca808x_link_change_notify()
H A Dat803x.c1059 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, IPQ5018_PHY_MMD1_MSE_THRESH1, in ipq5018_config_init()
1061 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, IPQ5018_PHY_MMD1_MSE_THRESH2, in ipq5018_config_init()
1067 phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, IPQ5018_PHY_MMD1_MDAC, in ipq5018_config_init()
/linux/include/uapi/linux/
H A Dmdio.h18 #define MDIO_MMD_PMAPMD 1 /* Physical Medium Attachment/ macro
152 #define MDIO_DEVS_PMAPMD MDIO_DEVS_PRESENT(MDIO_MMD_PMAPMD)
/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-mdio.c297 reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL); in xgbe_an73_set()
299 XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg); in xgbe_an73_set()
391 reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FECCTRL); in xgbe_an73_tx_training()
396 XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FECCTRL, reg); in xgbe_an73_tx_training()
402 reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL); in xgbe_an73_tx_training()
405 XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg); in xgbe_an73_tx_training()
1533 pdata->fec_ability = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, in xgbe_phy_init()
/linux/rust/kernel/net/phy/
H A Dreg.rs143 pub const PMAPMD: Self = Mmd(uapi::MDIO_MMD_PMAPMD as u8);
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_phy.c244 MDIO_MMD_PMAPMD, in ixgbe_probe_phy()
341 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
346 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
435 MDIO_MMD_PMAPMD, &ctrl); in ixgbe_reset_phy_generic()
1222 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD, in ixgbe_get_copper_speeds_supported()
1471 MDIO_MMD_PMAPMD, eword); in ixgbe_reset_phy_nl()
2786 MDIO_MMD_PMAPMD, &phy_data); in ixgbe_tn_check_overtemp()

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