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Searched refs:MDIO_MMD_PCS (Results 1 – 25 of 43) sorted by relevance

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/linux/drivers/net/phy/
H A Dmarvell-88q2xxx.c132 { MDIO_MMD_PCS, 0xffe4, 0x07b5 },
133 { MDIO_MMD_PCS, 0xffe4, 0x06b6 },
137 { MDIO_MMD_PCS, 0xffde, 0x402f },
138 { MDIO_MMD_PCS, 0xfe34, 0x4040 },
139 { MDIO_MMD_PCS, 0xfe2a, 0x3c1d },
140 { MDIO_MMD_PCS, 0xfe34, 0x0040 },
144 { MDIO_MMD_PCS, 0xffdb, 0x0010 },
148 { MDIO_MMD_PCS, 0x8033, 0x6801 },
152 { MDIO_MMD_PCS, 0xfe1b, 0x48 },
153 { MDIO_MMD_PCS, 0xffe4, 0x6b6 },
[all …]
H A Dbcm87xx.c114 pcs_status = phy_read_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_read_status()
144 reg = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_CONTROL); in bcm87xx_config_intr()
150 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr()
155 err = phy_write_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_config_intr()
159 err = phy_write_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_config_intr()
164 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr()
H A Dmarvell-88x2222.c90 int ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL, in mv2222_disable_aneg()
100 int ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL, in mv2222_enable_aneg()
119 return phy_modify_mmd(phydev, MDIO_MMD_PCS, in mv2222_set_sgmii_speed()
130 return phy_modify_mmd(phydev, MDIO_MMD_PCS, in mv2222_set_sgmii_speed()
140 return phy_modify_mmd(phydev, MDIO_MMD_PCS, in mv2222_set_sgmii_speed()
292 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_ADVERTISE, in mv2222_config_aneg()
307 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_aneg_done()
315 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_aneg_done()
328 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_read_status_10g()
364 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_read_status_1g()
[all …]
H A Dsmsc.c327 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR, in lan874x_phy_config_init()
333 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_MCFGR, in lan874x_phy_config_init()
351 rc = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR); in lan874x_get_wol()
423 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, in lan874x_set_wol_pattern()
429 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, in lan874x_set_wol_pattern()
437 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, reg, *mask); in lan874x_set_wol_pattern()
447 phy_write_mmd(phydev, MDIO_MMD_PCS, reg, 0); in lan874x_set_wol_pattern()
471 rc = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR); in lan874x_set_wol()
533 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, reg, in lan874x_set_wol()
540 rc = phy_write_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR, in lan874x_set_wol()
H A Dmarvell10g.c200 return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP); in mv2110_hwmon_read_temp_reg()
337 err = phy_modify_mmd(phydev, MDIO_MMD_PCS, unit + MDIO_CTRL1, in mv3310_reset()
342 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PCS, in mv3310_reset()
356 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1); in mv3310_get_downshift()
379 return phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1, in mv3310_set_downshift()
398 err = phy_modify_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC2, in mv3310_set_downshift()
408 return phy_modify_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1, in mv3310_set_downshift()
417 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1); in mv3310_get_edpd()
458 err = phy_modify_mmd_changed(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1, in mv3310_set_edpd()
906 err = phy_modify_mmd_changed(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1, in mv3310_config_mdix()
[all …]
H A Dadin1100.c223 return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL, in adin_set_loopback()
227 return phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL, in adin_set_loopback()
H A Dmicrochip.c290 val = phy_read_mmd(phydev, MDIO_MMD_PCS, in lan88xx_config_init()
294 phy_write_mmd(phydev, MDIO_MMD_PCS, PHY_ARDENNES_MMD_DEV_3_PHY_CFG, in lan88xx_config_init()
H A Dadin.c206 { MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE, ADIN1300_EEE_CAP_REG },
209 { MDIO_MMD_PCS, MDIO_CTRL1, ADIN1300_CLOCK_STOP_REG },
210 { MDIO_MMD_PCS, MDIO_PCS_EEE_WK_ERR, ADIN1300_LPI_WAKE_ERR_CNT_REG },
H A Das21xxx.c888 if (!phy_id_compare_vendor(phydev->c45_ids.device_ids[MDIO_MMD_PCS], in as21xxx_match_phy_device()
893 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_PHYSID1); in as21xxx_match_phy_device()
898 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_PHYSID2); in as21xxx_match_phy_device()
/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-phy-v1.c213 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_pcs_power_cycle()
216 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_pcs_power_cycle()
221 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_pcs_power_cycle()
264 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2); in xgbe_phy_kr_mode()
267 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg); in xgbe_phy_kr_mode()
269 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_kr_mode()
272 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg); in xgbe_phy_kr_mode()
307 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2); in xgbe_phy_kx_2500_mode()
310 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg); in xgbe_phy_kx_2500_mode()
312 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_phy_kx_2500_mode()
[all …]
H A Dxgbe-mdio.c55 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL); in xgbe_an37_disable_interrupts()
57 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg); in xgbe_an37_disable_interrupts()
64 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL); in xgbe_an37_enable_interrupts()
66 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg); in xgbe_an37_enable_interrupts()
1461 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1)); in xgbe_dump_phy_registers()
1463 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1)); in xgbe_dump_phy_registers()
1465 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID1)); in xgbe_dump_phy_registers()
1467 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID2)); in xgbe_dump_phy_registers()
1469 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS1)); in xgbe_dump_phy_registers()
1471 XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS2)); in xgbe_dump_phy_registers()
[all …]
H A Dxgbe-platform.c389 pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_platform_suspend()
391 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_platform_suspend()
407 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_platform_resume()
H A Dxgbe-pci.c364 pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1); in xgbe_pci_suspend()
366 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_pci_suspend()
380 XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl); in xgbe_pci_resume()
/linux/drivers/net/phy/qcom/
H A Dqca808x.c118 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_1, in qca808x_phy_fast_retrain_config()
120 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_4, in qca808x_phy_fast_retrain_config()
122 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_5, in qca808x_phy_fast_retrain_config()
124 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_3, in qca808x_phy_fast_retrain_config()
126 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_6, in qca808x_phy_fast_retrain_config()
128 phy_write_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_DEBUG_2, in qca808x_phy_fast_retrain_config()
213 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, QCA808X_PHY_MMD3_ADDR_CLD_CTRL7, in qca808x_config_init()
219 ret = phy_write_mmd(phydev, MDIO_MMD_PCS, in qca808x_config_init()
353 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8074, 0xc040); in qca808x_cable_test_start()
354 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8076, 0xc040); in qca808x_cable_test_start()
[all …]
H A Dat803x.c418 return phy_modify_mmd(phydev, MDIO_MMD_PCS, in at803x_smarteee_config()
433 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, AT803X_MMD3_SMARTEEE_CTL1, in at803x_smarteee_config()
438 return phy_modify_mmd(phydev, MDIO_MMD_PCS, AT803X_MMD3_SMARTEEE_CTL3, in at803x_smarteee_config()
872 return phy_modify_mmd(phydev, MDIO_MMD_PCS, in at8031_probe()
1000 phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL3, in ipq5018_cable_test_start()
1002 phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL4, in ipq5018_cable_test_start()
1004 phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL5, in ipq5018_cable_test_start()
1006 phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL6, in ipq5018_cable_test_start()
1008 phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL7, in ipq5018_cable_test_start()
1010 phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL9, in ipq5018_cable_test_start()
[all …]
H A Dqcom-phy-lib.c83 phy_write_mmd(phydev, MDIO_MMD_PCS, offsets[i], in at803x_set_wol()
130 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, in at8031_set_wol()
135 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, in at8031_set_wol()
561 val = phy_read_mmd(phydev, MDIO_MMD_PCS, cdt_length_reg); in qca808x_cdt_fault_length()
623 val = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA808X_MMD3_CDT_STATUS); in qca808x_cable_test_get_status()
H A Dqca83xx.c57 val = phy_read_mmd(phydev, MDIO_MMD_PCS, stat.reg); in qca83xx_get_stat()
113 phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_AZ_DEBUG, 0x803f); in qca83xx_config_init()
/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dmv88x201x.c46 cphy_mdio_write(cphy, MDIO_MMD_PCS, 0x8304, 0xdddd); in led_init()
214 cphy_mdio_read(cphy, MDIO_MMD_PCS, 0x8300, &val); in mv88x201x_phy_create()
215 cphy_mdio_write(cphy, MDIO_MMD_PCS, 0x8300, val | 1); in mv88x201x_phy_create()
219 cphy_mdio_read(cphy, MDIO_MMD_PCS, MDIO_STAT2, &val); in mv88x201x_phy_create()
/linux/drivers/vfio/platform/reset/
H A Dvfio_platform_amdxgbe.c71 pcs_value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1); in vfio_platform_amdxgbe_reset()
73 xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1, pcs_value); in vfio_platform_amdxgbe_reset()
78 pcs_value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_PCS, in vfio_platform_amdxgbe_reset()
/linux/drivers/net/pcs/
H A Dpcs-xpcs-wx.c152 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_CTRL2); in txgbe_xpcs_mode_quirk()
185 xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL2, MDIO_PCS_CTRL2_10GBR); in txgbe_xpcs_switch_mode()
190 xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL2, MDIO_PCS_CTRL2_10GBX); in txgbe_xpcs_switch_mode()
192 xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL1, 0); in txgbe_xpcs_switch_mode()
H A Dpcs-xpcs.c252 return xpcs_read_vendor(xpcs, MDIO_MMD_PCS, reg); in xpcs_read_vpcs()
257 return xpcs_write_vendor(xpcs, MDIO_MMD_PCS, reg, val); in xpcs_write_vpcs()
262 return xpcs_modify_vendor(xpcs, MDIO_MMD_PCS, reg, mask, val); in xpcs_modify_vpcs()
286 dev = MDIO_MMD_PCS; in xpcs_soft_reset()
321 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT2); in xpcs_read_fault_c73()
330 ret = xpcs_read_vendor(xpcs, MDIO_MMD_PCS, DW_VR_XS_PCS_DIG_STS); in xpcs_read_fault_c73()
339 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1); in xpcs_read_fault_c73()
346 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT2); in xpcs_read_fault_c73()
575 pcs_ctrl1 = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_CTRL1); in xpcs_c45_read_pcs_speed()
994 pcs_stat1 = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT1); in xpcs_get_state_c73()
[all …]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dtxc43128_phy.c212 ctrl = ef4_mdio_read(efx, MDIO_MMD_PCS, TXC_MTDIABLO_CTRL); in txc_bist_one()
214 ef4_mdio_write(efx, MDIO_MMD_PCS, TXC_MTDIABLO_CTRL, ctrl); in txc_bist_one()
265 ef4_mdio_write(efx, MDIO_MMD_PCS, TXC_MTDIABLO_CTRL, ctrl); in txc_bist_one()
272 return txc_bist_one(efx, MDIO_MMD_PCS, TXC_BIST_CTRL_TYPE_TSD); in txc_bist()
403 txc_glrgs_lane_power(efx, MDIO_MMD_PCS); in txc_set_power()
436 txc_reset_logic_mmd(efx, MDIO_MMD_PCS); in txc_reset_logic()
H A Dqt202x_phy.c81 reg = ef4_mdio_read(efx, MDIO_MMD_PCS, PCS_FW_HEARTBEAT_REG); in qt2025c_wait_heartbeat()
112 reg = ef4_mdio_read(efx, MDIO_MMD_PCS, PCS_UC8051_STATUS_REG); in qt2025c_wait_fw_status_good()
167 firmware_id[i] = ef4_mdio_read(efx, MDIO_MMD_PCS, in qt2025c_firmware_id()
464 mmd = MDIO_MMD_PCS; in qt202x_phy_get_module_eeprom()
/linux/drivers/net/ethernet/meta/fbnic/
H A Dfbnic_mdio.c106 if (devnum == MDIO_MMD_PCS) in fbnic_mdio_read_c45()
151 if (devnum == MDIO_MMD_PCS) in fbnic_mdio_write_c45()
/linux/include/uapi/linux/
H A Dmdio.h21 #define MDIO_MMD_PCS 3 /* Physical Coding Sublayer */ macro
173 #define MDIO_DEVS_PCS MDIO_DEVS_PRESENT(MDIO_MMD_PCS)

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