Searched refs:MDIO_CTRL1_RESET (Results 1 – 10 of 10) sorted by relevance
72 pcs_value |= MDIO_CTRL1_RESET; in vfio_platform_amdxgbe_reset()80 } while ((pcs_value & MDIO_CTRL1_RESET) && --count); in vfio_platform_amdxgbe_reset()82 if (pcs_value & MDIO_CTRL1_RESET) in vfio_platform_amdxgbe_reset()
39 ef4_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET); in ef4_mdio_reset_mmd()46 } while (spins && (ctrl & MDIO_CTRL1_RESET)); in ef4_mdio_reset_mmd()93 if (stat & MDIO_CTRL1_RESET) in ef4_mdio_wait_reset_mmds()
549 reg |= MDIO_CTRL1_RESET; in xgbe_phy_reset()556 } while ((reg & MDIO_CTRL1_RESET) && --count); in xgbe_phy_reset()558 if (reg & MDIO_CTRL1_RESET) in xgbe_phy_reset()
28 val, !(val & MDIO_CTRL1_RESET), in bcm84881_wait_init()
338 MDIO_CTRL1_RESET, MDIO_CTRL1_RESET); in mv3310_reset()344 !(val & MDIO_CTRL1_RESET), in mv3310_reset()
423 MDIO_CTRL1_RESET); in ixgbe_reset_phy_generic()449 if (!(ctrl & MDIO_CTRL1_RESET)) { in ixgbe_reset_phy_generic()456 if (ctrl & MDIO_CTRL1_RESET) { in ixgbe_reset_phy_generic()1420 (phy_data | MDIO_CTRL1_RESET)); in ixgbe_reset_phy_nl()1425 if ((phy_data & MDIO_CTRL1_RESET) == 0) in ixgbe_reset_phy_nl()1430 if ((phy_data & MDIO_CTRL1_RESET) != 0) { in ixgbe_reset_phy_nl()
104 #define MDIO_CTRL1_RESET BMCR_RESET macro
1638 MDIO_CTRL1_RESET, MDIO_CTRL1_RESET); in rtl822x_c45_soft_reset()1644 !(val & MDIO_CTRL1_RESET), in rtl822x_c45_soft_reset()
389 MDIO_CTRL1_RESET | MDIO_PCS_CTRL1_LOOPBACK | in mv88e639x_xg_pcs_enable()
359 MDIO_CTRL1_RESET); in t3_phy_reset()367 ctl &= MDIO_CTRL1_RESET; in t3_phy_reset()