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Searched refs:MC_SEQ_WR_CTL_2_LP (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h195 #define MC_SEQ_WR_CTL_2_LP 0xAD6 macro
/linux/drivers/gpu/drm/radeon/
H A Dsid.h592 #define MC_SEQ_WR_CTL_2_LP 0x2b58 macro
H A Dcikd.h717 #define MC_SEQ_WR_CTL_2_LP 0x2b58 macro
H A Dci_dpm.c4420 *out_reg = MC_SEQ_WR_CTL_2_LP >> 2; in ci_check_s0_mc_reg_index()
4605 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in ci_initialize_mc_reg_table()
H A Dsi_dpm.c5414 *out_reg = MC_SEQ_WR_CTL_2_LP >> 2; in si_check_s0_mc_reg_index()
5501 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in si_initialize_mc_reg_table()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c5989 *out_reg = MC_SEQ_WR_CTL_2_LP; in si_check_s0_mc_reg_index()
6076 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in si_initialize_mc_reg_table()