Searched refs:MCFSIM2_GPIOINTENABLE (Results 1 – 4 of 4) sorted by relevance
23 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 25 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 31 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask() 33 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask()
23 u32 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 31 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask() 36 u32 imr = readl(MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask() 44 writel(imr, MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask()
113 gpio = readl(MCFSIM2_GPIOINTENABLE); in m5249_smc91x_init() 114 writel(gpio | 0x40, MCFSIM2_GPIOINTENABLE); in m5249_smc91x_init()
200 #define MCFSIM2_GPIOINTENABLE (MCF_MBAR2 + 0xc4) /* GPIO intr enable */ macro