/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn20/ |
H A D | dcn20_dpp_cm.c | 509 mode = LUT_RAM_A; in dpp20_get_blndgam_current() 534 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dpp20_program_blnd_lut() 537 next_mode = LUT_RAM_A; in dpp20_program_blnd_lut() 540 dpp20_configure_blnd_lut(dpp_base, next_mode == LUT_RAM_A); in dpp20_program_blnd_lut() 542 if (next_mode == LUT_RAM_A) in dpp20_program_blnd_lut() 551 next_mode == LUT_RAM_A ? 1:2); in dpp20_program_blnd_lut() 602 mode = LUT_RAM_A; in dpp20_get_shaper_current() 946 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dpp20_program_shaper() 949 next_mode = LUT_RAM_A; in dpp20_program_shaper() 951 dpp20_configure_shaper_lut(dpp_base, next_mode == LUT_RAM_A); in dpp20_program_shaper() [all...] |
/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn32/ |
H A D | dcn32_mpc.c | 113 mode = LUT_RAM_A; in mpc32_get_post1dlut_current() 279 next_mode = LUT_RAM_A; in mpc32_program_post1dlut() 284 mpc32_configure_post1dlut(mpc, mpcc_id, next_mode == LUT_RAM_A); in mpc32_program_post1dlut() 286 if (next_mode == LUT_RAM_A) in mpc32_program_post1dlut() 296 MPCC_MCM_1DLUT_SELECT, next_mode == LUT_RAM_A ? 0 : 1); in mpc32_program_post1dlut() 314 mode = LUT_RAM_A; in mpc32_get_shaper_current() 732 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in mpc32_program_shaper() 735 next_mode = LUT_RAM_A; in mpc32_program_shaper() 737 mpc32_configure_shaper_lut(mpc, next_mode == LUT_RAM_A, mpcc_id); in mpc32_program_shaper() 739 if (next_mode == LUT_RAM_A) in mpc32_program_shaper() [all...] |
/linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
H A D | dcn30_dwb_cm.c | 161 mode = LUT_RAM_A; in dwb3_get_ogam_current() 252 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dwb3_program_ogam_lut() 255 next_mode = LUT_RAM_A; in dwb3_program_ogam_lut() 257 dwb3_configure_ogam_lut(dwbc30, next_mode == LUT_RAM_A); in dwb3_program_ogam_lut() 259 if (next_mode == LUT_RAM_A) in dwb3_program_ogam_lut() 267 REG_UPDATE(DWB_OGAM_CONTROL, DWB_OGAM_SELECT, next_mode == LUT_RAM_A ? 0 : 1); in dwb3_program_ogam_lut()
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/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
H A D | dcn30_dpp.c | 63 s->gamcor_mode = LUT_RAM_A; // Otherwise, LUT_RAM_B in dpp30_read_state() 82 s->rgam_lut_mode = LUT_RAM_A; // Otherwise, LUT_RAM_B in dpp30_read_state() 772 mode = LUT_RAM_A; in dpp3_get_blndgam_current() 799 next_mode = LUT_RAM_A; in dpp3_program_blnd_lut() 804 dpp3_configure_blnd_lut(dpp_base, next_mode == LUT_RAM_A); in dpp3_program_blnd_lut() 806 if (next_mode == LUT_RAM_A) in dpp3_program_blnd_lut() 816 CM_BLNDGAM_SELECT, next_mode == LUT_RAM_A ? 0 : 1); in dpp3_program_blnd_lut() 867 mode = LUT_RAM_A; in dpp3_get_shaper_current() 1215 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dpp3_program_shaper() 1218 next_mode = LUT_RAM_A; in dpp3_program_shaper() [all...] |
H A D | dcn30_dpp_cm.c | 69 mode = LUT_RAM_A; in dpp30_get_gamcor_current() 235 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dpp3_program_gamcor_lut() 238 next_mode = LUT_RAM_A; in dpp3_program_gamcor_lut() 241 dpp3_configure_gamcor_lut(dpp_base, next_mode == LUT_RAM_A); in dpp3_program_gamcor_lut() 296 next_mode == LUT_RAM_A); in dpp3_program_gamcor_lut() 299 REG_UPDATE(CM_GAMCOR_CONTROL, CM_GAMCOR_SELECT, next_mode == LUT_RAM_A ? 0:1); in dpp3_program_gamcor_lut()
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/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn30/ |
H A D | dcn30_mpc.c | 150 mode = LUT_RAM_A; in mpc3_get_ogam_current() 364 next_mode = LUT_RAM_A; in mpc3_set_output_gamma() 365 else if (current_mode == LUT_RAM_A) in mpc3_set_output_gamma() 368 next_mode = LUT_RAM_A; in mpc3_set_output_gamma() 371 mpc3_configure_ogam_lut(mpc, mpcc_id, next_mode == LUT_RAM_A); in mpc3_set_output_gamma() 373 if (next_mode == LUT_RAM_A) in mpc3_set_output_gamma() 383 MPCC_OGAM_SELECT, next_mode == LUT_RAM_A ? 0:1); in mpc3_set_output_gamma() 460 mode = LUT_RAM_A; in mpc3_get_shaper_current() 883 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in mpc3_program_shaper() 886 next_mode = LUT_RAM_A; in mpc3_program_shaper() [all...] |
/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn20/ |
H A D | dcn20_mpc.c | 309 mode = LUT_RAM_A; in mpc20_get_ogam_current() 427 next_mode == LUT_RAM_A ? 1:2); in apply_DEDCN20_305_wa() 450 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in mpc2_set_output_gamma() 453 next_mode = LUT_RAM_A; in mpc2_set_output_gamma() 456 mpc20_configure_ogam_lut(mpc, mpcc_id, next_mode == LUT_RAM_A); in mpc2_set_output_gamma() 458 if (next_mode == LUT_RAM_A) in mpc2_set_output_gamma() 469 next_mode == LUT_RAM_A ? 1:2); in mpc2_set_output_gamma()
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/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn401/ |
H A D | dcn401_mpc.c | 87 mode = LUT_RAM_A; in get3dlut_config() 113 const enum dc_lut_mode next_mode = lut_bank_a ? LUT_RAM_A : LUT_RAM_B; in mpc401_populate_lut() 132 mpc32_configure_post1dlut(mpc, mpcc_id, next_mode == LUT_RAM_A); in mpc401_populate_lut() 134 if (next_mode == LUT_RAM_A) in mpc401_populate_lut() 149 mpc32_configure_shaper_lut(mpc, next_mode == LUT_RAM_A, mpcc_id); in mpc401_populate_lut() 151 if (next_mode == LUT_RAM_A) in mpc401_populate_lut()
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/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | hw_shared.h | 277 LUT_RAM_A, enumerator
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