Searched refs:KVM_REG_RISCV_FP_D (Results 1 – 4 of 4) sorted by relevance
458 __u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_FP_D); in fp_d_id_to_str()460 assert((id & KVM_REG_RISCV_TYPE_MASK) == KVM_REG_RISCV_FP_D); in fp_d_id_to_str()785 case KVM_REG_RISCV_FP_D: in print_reg()979 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[0]),980 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[1]),981 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[2]),982 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[3]),983 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[4]),984 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[5]),985 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[6]),[all …]
103 } else if ((rtype == KVM_REG_RISCV_FP_D) && in kvm_riscv_vcpu_get_reg_fp()152 } else if ((rtype == KVM_REG_RISCV_FP_D) && in kvm_riscv_vcpu_set_reg_fp()
1056 KVM_REG_RISCV_FP_D | i; in copy_fp_d_reg_indices()1066 reg = KVM_REG_RISCV | KVM_REG_SIZE_U32 | KVM_REG_RISCV_FP_D | i; in copy_fp_d_reg_indices()1265 case KVM_REG_RISCV_FP_D: in kvm_riscv_vcpu_set_reg()1267 KVM_REG_RISCV_FP_D); in kvm_riscv_vcpu_set_reg()1298 case KVM_REG_RISCV_FP_D: in kvm_riscv_vcpu_get_reg()1300 KVM_REG_RISCV_FP_D); in kvm_riscv_vcpu_get_reg()
284 #define KVM_REG_RISCV_FP_D (0x06 << KVM_REG_RISCV_TYPE_SHIFT) macro