Searched refs:HUBP_CLK_CNTL (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn35/ |
| H A D | dcn35_hubp.c | 45 REG_UPDATE(HUBP_CLK_CNTL, HUBP_FGCG_REP_DIS, !enable); in hubp35_set_fgcg()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| H A D | dcn10_hubp.c | 1070 REG_GET(HUBP_CLK_CNTL, in hubp1_read_state_common()
1304 REG_UPDATE(HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, clk_enable); in hubp1_clk_cntl()
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| H A D | dcn10_hubp.h | 107 SRI(HUBP_CLK_CNTL, HUBP, id),\
255 uint32_t HUBP_CLK_CNTL; \
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn30/ |
| H A D | dcn30_hubp.c | 500 reg_state->clk_cntl = REG_READ(HUBP_CLK_CNTL); in hubp3_read_reg_state()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| H A D | dcn20_hubp.c | 1121 REG_UPDATE(HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, clk_enable); in hubp2_clk_cntl()
1307 REG_GET(HUBP_CLK_CNTL, in hubp2_read_state_common()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| H A D | dcn401_hubp.c | 992 REG_GET(HUBP_CLK_CNTL, in hubp401_read_state()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/ |
| H A D | hw_sequencer.h | 940 HUBP_CLK_CNTL, enumerator
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 1211 case HUBP_CLK_CNTL: in hwss_execute_sequence()
3586 seq_state->steps[*seq_state->num_steps].func = HUBP_CLK_CNTL; in hwss_add_hubp_clk_cntl()
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