Home
last modified time | relevance | path

Searched refs:HCLK_VPU (Results 1 – 19 of 19) sorted by relevance

/linux/include/dt-bindings/clock/
H A Drv1108-cru.h164 #define HCLK_VPU 345 macro
166 #define CLK_NR_CLKS (HCLK_VPU + 1)
H A Drk3228-cru.h133 #define HCLK_VPU 464 macro
H A Dpx30-cru.h120 #define HCLK_VPU 244 macro
H A Drk3328-cru.h188 #define HCLK_VPU 326 macro
H A Drockchip,rk3528-cru.h147 #define HCLK_VPU 135 macro
H A Drockchip,rk3588-cru.h449 #define HCLK_VPU 434 macro
H A Drk3568-cru.h303 #define HCLK_VPU 239 macro
/linux/arch/arm/boot/dts/rockchip/
H A Drk322x.dtsi231 <&cru HCLK_VPU>;
624 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
634 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi354 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
708 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
719 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
729 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
H A Dpx30.dtsi308 <&cru HCLK_VPU>,
1108 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
1118 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
H A Drk356x-base.dtsi575 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
586 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
H A Drk3588-base.dtsi1249 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
1260 clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
/linux/drivers/clk/rockchip/
H A Dclk-rk3228.c632 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, RK2928_CLKGATE_CON(15), 1, GFLAGS),
H A Dclk-rk3328.c529 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", CLK_SET_RATE_PARENT,
H A Dclk-rv1108.c258 GATE(HCLK_VPU, "hclk_vpu", "hclk_rkvdec_pre", 0,
H A Dclk-px30.c873 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, PX30_CLKGATE_CON(4), 6, GFLAGS),
H A Dclk-rk3528.c955 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_root", 0,
H A Dclk-rk3568.c1101 GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0,
H A Dclk-rk3588.c1710 GATE(HCLK_VPU, "hclk_vpu", "hclk_vdpu_root", 0,