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Searched refs:GS_MIA_IN_RESET (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_reg.h18 #define GS_MIA_IN_RESET (0x01 << GS_RESET_SHIFT) macro
H A Dselftest_guc_hangcheck.c100 if (!(guc_status & GS_MIA_IN_RESET)) { in intel_hang_guc()
H A Dintel_guc_fw.c210 REG_FIELD_GET(GS_MIA_IN_RESET, status), in guc_wait_ucode()
H A Dintel_uc.c74 gt_WARN(gt, !(guc_status & GS_MIA_IN_RESET), in __intel_uc_reset_hw()
/linux/drivers/gpu/drm/xe/regs/
H A Dxe_guc_regs.h41 #define GS_MIA_IN_RESET REG_BIT(0) macro
/linux/drivers/gpu/drm/i915/gvt/
H A Dmmio.c261 /* uc reset hw expect GS_MIA_IN_RESET */ in intel_vgpu_reset_mmio()
262 vgpu_vreg_t(vgpu, GUC_STATUS) |= GS_MIA_IN_RESET; in intel_vgpu_reset_mmio()
H A Dhandlers.c360 vgpu_vreg_t(vgpu, GUC_STATUS) |= GS_MIA_IN_RESET; in gdrst_mmio_write()
1960 vgpu_vreg(vgpu, offset) &= ~GS_MIA_IN_RESET; in guc_status_read()
/linux/drivers/gpu/drm/xe/
H A Dxe_guc.c909 if (!(guc_status & GS_MIA_IN_RESET)) { in xe_guc_reset()
1118 REG_FIELD_GET(GS_MIA_IN_RESET, status), in guc_wait_ucode()