Searched refs:GPHY_CTRL (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/net/ethernet/marvell/ |
| H A D | sky2.c | 714 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_up() 723 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_down() 819 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_wol_init() 906 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_mac_init() 907 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_mac_init() 2083 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_hw_down() 3335 reg = sky2_read16(hw, GPHY_CTRL); in sky2_reset() 3336 sky2_write16(hw, GPHY_CTRL, reg | GPC_INTPOL); in sky2_reset()
|
| H A D | skge.c | 181 skge_write32(hw, SK_REG(port, GPHY_CTRL), in skge_wol_init() 186 skge_write32(hw, SK_REG(port, GPHY_CTRL), in skge_wol_init() 2078 skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in yukon_mac_init() 2096 skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET); in yukon_mac_init() 2097 skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_CLR); in yukon_mac_init() 2247 skge_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in yukon_stop()
|
| H A D | sky2.h | 1101 GPHY_CTRL = 0x0f04,/* 32 bit GPHY Control Reg */ enumerator
|
| H A D | skge.h | 851 GPHY_CTRL = 0x0f04,/* 32 bit GPHY Control Reg */ enumerator
|