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Searched refs:GPCPLL_CFG (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgk20a.c262 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_ENABLE, GPCPLL_CFG_ENABLE); in gk20a_pllg_enable()
263 nvkm_rd32(device, GPCPLL_CFG); in gk20a_pllg_enable()
266 val = nvkm_rd32(device, GPCPLL_CFG); in gk20a_pllg_enable()
269 nvkm_wr32(device, GPCPLL_CFG, val); in gk20a_pllg_enable()
273 if (nvkm_wait_usec(device, 300, GPCPLL_CFG, GPCPLL_CFG_LOCK, in gk20a_pllg_enable()
292 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_ENABLE, 0); in gk20a_pllg_disable()
293 nvkm_rd32(device, GPCPLL_CFG); in gk20a_pllg_disable()
562 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 1); in gk20a_clk_fini()
574 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 0); in gk20a_clk_init()
575 nvkm_rd32(device, GPCPLL_CFG); in gk20a_clk_init()
H A Dgm20b.c327 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_ENABLE, GPCPLL_CFG_ENABLE); in gm20b_pllg_enable()
328 nvkm_rd32(device, GPCPLL_CFG); in gm20b_pllg_enable()
334 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_SYNC_MODE, in gm20b_pllg_enable()
336 nvkm_rd32(device, GPCPLL_CFG); in gm20b_pllg_enable()
354 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_SYNC_MODE, 0); in gm20b_pllg_disable()
356 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_ENABLE, 0); in gm20b_pllg_disable()
357 nvkm_rd32(device, GPCPLL_CFG); in gm20b_pllg_disable()
739 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 1); in gm20b_clk_fini()
821 nvkm_mask(device, GPCPLL_CFG, GPCPLL_CFG_IDDQ, 0); in gm20b_clk_init()
822 nvkm_rd32(device, GPCPLL_CFG); in gm20b_clk_init()
H A Dgk20a.h35 #define GPCPLL_CFG (SYS_GPCPLL_CFG_BASE + 0) macro
139 val = nvkm_rd32(device, GPCPLL_CFG); in gk20a_pllg_is_enabled()