Searched refs:GML_48KHZ (Results 1 – 4 of 4) sorted by relevance
141 control_reg = GML_CONVERTER_ENABLE | GML_48KHZ; in load_asic()180 clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1; in set_sample_rate()
138 err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ, in load_asic()178 clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1; in set_sample_rate()
137 control_reg = GML_CONVERTER_ENABLE | GML_48KHZ; in load_asic()243 clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1; in set_sample_rate()
465 #define GML_48KHZ 0x2 macro