Home
last modified time | relevance | path

Searched refs:GEN8_GT_IIR (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_irq.c411 iir = raw_reg_read(regs, GEN8_GT_IIR(0)); in gen8_gt_irq_handler()
417 raw_reg_write(regs, GEN8_GT_IIR(0), iir); in gen8_gt_irq_handler()
422 iir = raw_reg_read(regs, GEN8_GT_IIR(1)); in gen8_gt_irq_handler()
428 raw_reg_write(regs, GEN8_GT_IIR(1), iir); in gen8_gt_irq_handler()
433 iir = raw_reg_read(regs, GEN8_GT_IIR(3)); in gen8_gt_irq_handler()
437 raw_reg_write(regs, GEN8_GT_IIR(3), iir); in gen8_gt_irq_handler()
442 iir = raw_reg_read(regs, GEN8_GT_IIR(2)); in gen8_gt_irq_handler()
446 raw_reg_write(regs, GEN8_GT_IIR(2), iir); in gen8_gt_irq_handler()
H A Dintel_gt_pm_irq.c65 i915_reg_t reg = GRAPHICS_VER(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; in gen6_gt_pm_reset_iir()
/linux/drivers/gpu/drm/i915/
H A Di915_reg.h881 #define GEN8_GT_IIR(which) _MMIO(0x44308 + (0x10 * (which))) macro
886 GEN8_GT_IIR(which))
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc.c101 guc_WARN_ON_ONCE(guc, intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) & in gen9_enable_guc_interrupts()
/linux/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c2482 MMIO_DH(GEN8_GT_IIR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_bdw_mmio_info()
2486 MMIO_DH(GEN8_GT_IIR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_bdw_mmio_info()
2490 MMIO_DH(GEN8_GT_IIR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_bdw_mmio_info()
2494 MMIO_DH(GEN8_GT_IIR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); in init_bdw_mmio_info()