Searched refs:FSL_XCVR_GP_PLL_DIV_MFI_SHIFT (Results 1 – 2 of 2) sorted by relevance
398 #define FSL_XCVR_GP_PLL_DIV_MFI_SHIFT 16 macro
405 val = fsl_xcvr_pll_cfg[i].mfi << FSL_XCVR_GP_PLL_DIV_MFI_SHIFT | div; in fsl_xcvr_en_phy_pll()