1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Host communication command constants for ChromeOS EC 4 * 5 * Copyright (C) 2012 Google, Inc 6 * 7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 9 */ 10 11 /* Host communication command constants for Chrome EC */ 12 13 #ifndef __CROS_EC_COMMANDS_H 14 #define __CROS_EC_COMMANDS_H 15 16 #include <linux/bits.h> 17 #include <linux/types.h> 18 19 #define BUILD_ASSERT(_cond) 20 21 /* 22 * Current version of this protocol 23 * 24 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is 25 * determined in other ways. Remove this once the kernel code no longer 26 * depends on it. 27 */ 28 #define EC_PROTO_VERSION 0x00000002 29 30 /* Command version mask */ 31 #define EC_VER_MASK(version) BIT(version) 32 33 /* I/O addresses for ACPI commands */ 34 #define EC_LPC_ADDR_ACPI_DATA 0x62 35 #define EC_LPC_ADDR_ACPI_CMD 0x66 36 37 /* I/O addresses for host command */ 38 #define EC_LPC_ADDR_HOST_DATA 0x200 39 #define EC_LPC_ADDR_HOST_CMD 0x204 40 41 /* I/O addresses for host command args and params */ 42 /* Protocol version 2 */ 43 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 44 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 45 * EC_PROTO2_MAX_PARAM_SIZE 46 */ 47 /* Protocol version 3 */ 48 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 49 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 50 51 /* 52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 53 * and they tell the kernel that so we have to think of it as two parts. 54 * 55 * Other BIOSes report only the I/O port region spanned by the Microchip 56 * MEC series EC; an attempt to address a larger region may fail. 57 */ 58 #define EC_HOST_CMD_REGION0 0x800 59 #define EC_HOST_CMD_REGION1 0x880 60 #define EC_HOST_CMD_REGION_SIZE 0x80 61 #define EC_HOST_CMD_MEC_REGION_SIZE 0x8 62 63 /* EC command register bit functions */ 64 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ 65 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 66 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ 67 #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ 68 #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ 69 #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ 70 #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ 71 72 #define EC_LPC_ADDR_MEMMAP 0x900 73 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ 74 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ 75 76 /* The offset address of each type of data in mapped memory. */ 77 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */ 78 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */ 79 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */ 80 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */ 81 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */ 82 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */ 83 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */ 84 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */ 85 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */ 86 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */ 87 /* Unused 0x28 - 0x2f */ 88 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 89 /* Unused 0x31 - 0x33 */ 90 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ 91 /* Battery values are all 32 bits, unless otherwise noted. */ 92 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 93 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 94 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 95 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ 96 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ 97 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ 98 /* Unused 0x4f */ 99 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 100 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 101 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ 102 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */ 103 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */ 104 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */ 105 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */ 106 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */ 107 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */ 108 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */ 109 /* Unused 0x84 - 0x8f */ 110 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 111 /* Unused 0x91 */ 112 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 113 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 114 /* 0x94 - 0x99: 1st Accelerometer */ 115 /* 0x9a - 0x9f: 2nd Accelerometer */ 116 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 117 /* Unused 0xa6 - 0xdf */ 118 119 /* 120 * ACPI is unable to access memory mapped data at or above this offset due to 121 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 122 * which might be needed by ACPI. 123 */ 124 #define EC_MEMMAP_NO_ACPI 0xe0 125 126 /* Define the format of the accelerometer mapped memory status byte. */ 127 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 128 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) 129 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) 130 131 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 132 #define EC_TEMP_SENSOR_ENTRIES 16 133 /* 134 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B. 135 * 136 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2. 137 */ 138 #define EC_TEMP_SENSOR_B_ENTRIES 8 139 140 /* Special values for mapped temperature sensors */ 141 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff 142 #define EC_TEMP_SENSOR_ERROR 0xfe 143 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd 144 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc 145 /* 146 * The offset of temperature value stored in mapped memory. This allows 147 * reporting a temperature range of 200K to 454K = -73C to 181C. 148 */ 149 #define EC_TEMP_SENSOR_OFFSET 200 150 151 /* 152 * Number of ALS readings at EC_MEMMAP_ALS 153 */ 154 #define EC_ALS_ENTRIES 2 155 156 /* 157 * The default value a temperature sensor will return when it is present but 158 * has not been read this boot. This is a reasonable number to avoid 159 * triggering alarms on the host. 160 */ 161 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET) 162 163 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */ 164 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */ 165 #define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */ 166 167 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */ 168 #define EC_BATT_FLAG_AC_PRESENT 0x01 169 #define EC_BATT_FLAG_BATT_PRESENT 0x02 170 #define EC_BATT_FLAG_DISCHARGING 0x04 171 #define EC_BATT_FLAG_CHARGING 0x08 172 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 173 /* Set if some of the static/dynamic data is invalid (or outdated). */ 174 #define EC_BATT_FLAG_INVALID_DATA 0x20 175 176 /* Switch flags at EC_MEMMAP_SWITCHES */ 177 #define EC_SWITCH_LID_OPEN 0x01 178 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02 179 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04 180 /* Was recovery requested via keyboard; now unused. */ 181 #define EC_SWITCH_IGNORE1 0x08 182 /* Recovery requested via dedicated signal (from servo board) */ 183 #define EC_SWITCH_DEDICATED_RECOVERY 0x10 184 /* Was fake developer mode switch; now unused. Remove in next refactor. */ 185 #define EC_SWITCH_IGNORE0 0x20 186 187 /* Host command interface flags */ 188 /* Host command interface supports LPC args (LPC interface only) */ 189 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01 190 /* Host command interface supports version 3 protocol */ 191 #define EC_HOST_CMD_FLAG_VERSION_3 0x02 192 193 /* Wireless switch flags */ 194 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */ 195 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */ 196 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */ 197 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 198 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 199 200 /*****************************************************************************/ 201 /* 202 * ACPI commands 203 * 204 * These are valid ONLY on the ACPI command/data port. 205 */ 206 207 /* 208 * ACPI Read Embedded Controller 209 * 210 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 211 * 212 * Use the following sequence: 213 * 214 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 215 * - Wait for EC_LPC_CMDR_PENDING bit to clear 216 * - Write address to EC_LPC_ADDR_ACPI_DATA 217 * - Wait for EC_LPC_CMDR_DATA bit to set 218 * - Read value from EC_LPC_ADDR_ACPI_DATA 219 */ 220 #define EC_CMD_ACPI_READ 0x0080 221 222 /* 223 * ACPI Write Embedded Controller 224 * 225 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 226 * 227 * Use the following sequence: 228 * 229 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 230 * - Wait for EC_LPC_CMDR_PENDING bit to clear 231 * - Write address to EC_LPC_ADDR_ACPI_DATA 232 * - Wait for EC_LPC_CMDR_PENDING bit to clear 233 * - Write value to EC_LPC_ADDR_ACPI_DATA 234 */ 235 #define EC_CMD_ACPI_WRITE 0x0081 236 237 /* 238 * ACPI Burst Enable Embedded Controller 239 * 240 * This enables burst mode on the EC to allow the host to issue several 241 * commands back-to-back. While in this mode, writes to mapped multi-byte 242 * data are locked out to ensure data consistency. 243 */ 244 #define EC_CMD_ACPI_BURST_ENABLE 0x0082 245 246 /* 247 * ACPI Burst Disable Embedded Controller 248 * 249 * This disables burst mode on the EC and stops preventing EC writes to mapped 250 * multi-byte data. 251 */ 252 #define EC_CMD_ACPI_BURST_DISABLE 0x0083 253 254 /* 255 * ACPI Query Embedded Controller 256 * 257 * This clears the lowest-order bit in the currently pending host events, and 258 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 259 * event 0x80000000 = 32), or 0 if no event was pending. 260 */ 261 #define EC_CMD_ACPI_QUERY_EVENT 0x0084 262 263 /* Valid addresses in ACPI memory space, for read/write commands */ 264 265 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 266 #define EC_ACPI_MEM_VERSION 0x00 267 /* 268 * Test location; writing value here updates test compliment byte to (0xff - 269 * value). 270 */ 271 #define EC_ACPI_MEM_TEST 0x01 272 /* Test compliment; writes here are ignored. */ 273 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 274 275 /* Keyboard backlight brightness percent (0 - 100) */ 276 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 277 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 278 #define EC_ACPI_MEM_FAN_DUTY 0x04 279 280 /* 281 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 282 * independent thresholds attached to them. The current value of the ID 283 * register determines which sensor is affected by the THRESHOLD and COMMIT 284 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 285 * as the memory-mapped sensors. The COMMIT register applies those settings. 286 * 287 * The spec does not mandate any way to read back the threshold settings 288 * themselves, but when a threshold is crossed the AP needs a way to determine 289 * which sensor(s) are responsible. Each reading of the ID register clears and 290 * returns one sensor ID that has crossed one of its threshold (in either 291 * direction) since the last read. A value of 0xFF means "no new thresholds 292 * have tripped". Setting or enabling the thresholds for a sensor will clear 293 * the unread event count for that sensor. 294 */ 295 #define EC_ACPI_MEM_TEMP_ID 0x05 296 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 297 #define EC_ACPI_MEM_TEMP_COMMIT 0x07 298 /* 299 * Here are the bits for the COMMIT register: 300 * bit 0 selects the threshold index for the chosen sensor (0/1) 301 * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 302 * Each write to the commit register affects one threshold. 303 */ 304 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) 305 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) 306 /* 307 * Example: 308 * 309 * Set the thresholds for sensor 2 to 50 C and 60 C: 310 * write 2 to [0x05] -- select temp sensor 2 311 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 312 * write 0x2 to [0x07] -- enable threshold 0 with this value 313 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 314 * write 0x3 to [0x07] -- enable threshold 1 with this value 315 * 316 * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 317 * write 2 to [0x05] -- select temp sensor 2 318 * write 0x1 to [0x07] -- disable threshold 1 319 */ 320 321 /* DPTF battery charging current limit */ 322 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 323 324 /* Charging limit is specified in 64 mA steps */ 325 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 326 /* Value to disable DPTF battery charging limit */ 327 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 328 329 /* 330 * Report device orientation 331 * Bits Definition 332 * 3:1 Device DPTF Profile Number (DDPN) 333 * 0 = Reserved for backward compatibility (indicates no valid 334 * profile number. Host should fall back to using TBMD). 335 * 1..7 = DPTF Profile number to indicate to host which table needs 336 * to be loaded. 337 * 0 Tablet Mode Device Indicator (TBMD) 338 */ 339 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 340 #define EC_ACPI_MEM_TBMD_SHIFT 0 341 #define EC_ACPI_MEM_TBMD_MASK 0x1 342 #define EC_ACPI_MEM_DDPN_SHIFT 1 343 #define EC_ACPI_MEM_DDPN_MASK 0x7 344 345 /* 346 * Report device features. Uses the same format as the host command, except: 347 * 348 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set 349 * of features", which is of limited interest when the system is already 350 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since 351 * these are supported, it defaults to 0. 352 * This allows detecting the presence of this field since older versions of 353 * the EC codebase would simply return 0xff to that unknown address. Check 354 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits 355 * are valid. 356 */ 357 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a 358 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b 359 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c 360 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d 361 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e 362 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f 363 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 364 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 365 366 #define EC_ACPI_MEM_BATTERY_INDEX 0x12 367 368 /* 369 * USB Port Power. Each bit indicates whether the corresponding USB ports' power 370 * is enabled (1) or disabled (0). 371 * bit 0 USB port ID 0 372 * ... 373 * bit 7 USB port ID 7 374 */ 375 #define EC_ACPI_MEM_USB_PORT_POWER 0x13 376 377 /* 378 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 379 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 380 */ 381 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 382 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 383 384 /* Current version of ACPI memory address space */ 385 #define EC_ACPI_MEM_VERSION_CURRENT 2 386 387 388 /* 389 * This header file is used in coreboot both in C and ACPI code. The ACPI code 390 * is pre-processed to handle constants but the ASL compiler is unable to 391 * handle actual C code so keep it separate. 392 */ 393 394 395 /* 396 * Attributes for EC request and response packets. Just defining __packed 397 * results in inefficient assembly code on ARM, if the structure is actually 398 * 32-bit aligned, as it should be for all buffers. 399 * 400 * Be very careful when adding these to existing structures. They will round 401 * up the structure size to the specified boundary. 402 * 403 * Also be very careful to make that if a structure is included in some other 404 * parent structure that the alignment will still be true given the packing of 405 * the parent structure. This is particularly important if the sub-structure 406 * will be passed as a pointer to another function, since that function will 407 * not know about the misaligment caused by the parent structure's packing. 408 * 409 * Also be very careful using __packed - particularly when nesting non-packed 410 * structures inside packed ones. In fact, DO NOT use __packed directly; 411 * always use one of these attributes. 412 * 413 * Once everything is annotated properly, the following search strings should 414 * not return ANY matches in this file other than right here: 415 * 416 * "__packed" - generates inefficient code; all sub-structs must also be packed 417 * 418 * "struct [^_]" - all structs should be annotated, except for structs that are 419 * members of other structs/unions (and their original declarations should be 420 * annotated). 421 */ 422 423 /* 424 * Packed structures make no assumption about alignment, so they do inefficient 425 * byte-wise reads. 426 */ 427 #define __ec_align1 __packed 428 #define __ec_align2 __packed 429 #define __ec_align4 __packed 430 #define __ec_align_size1 __packed 431 #define __ec_align_offset1 __packed 432 #define __ec_align_offset2 __packed 433 #define __ec_todo_packed __packed 434 #define __ec_todo_unpacked 435 436 437 /* LPC command status byte masks */ 438 /* EC has written a byte in the data register and host hasn't read it yet */ 439 #define EC_LPC_STATUS_TO_HOST 0x01 440 /* Host has written a command/data byte and the EC hasn't read it yet */ 441 #define EC_LPC_STATUS_FROM_HOST 0x02 442 /* EC is processing a command */ 443 #define EC_LPC_STATUS_PROCESSING 0x04 444 /* Last write to EC was a command, not data */ 445 #define EC_LPC_STATUS_LAST_CMD 0x08 446 /* EC is in burst mode */ 447 #define EC_LPC_STATUS_BURST_MODE 0x10 448 /* SCI event is pending (requesting SCI query) */ 449 #define EC_LPC_STATUS_SCI_PENDING 0x20 450 /* SMI event is pending (requesting SMI query) */ 451 #define EC_LPC_STATUS_SMI_PENDING 0x40 452 /* (reserved) */ 453 #define EC_LPC_STATUS_RESERVED 0x80 454 455 /* 456 * EC is busy. This covers both the EC processing a command, and the host has 457 * written a new command but the EC hasn't picked it up yet. 458 */ 459 #define EC_LPC_STATUS_BUSY_MASK \ 460 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 461 462 /* 463 * Host command response codes (16-bit). Note that response codes should be 464 * stored in a uint16_t rather than directly in a value of this type. 465 */ 466 enum ec_status { 467 EC_RES_SUCCESS = 0, 468 EC_RES_INVALID_COMMAND = 1, 469 EC_RES_ERROR = 2, 470 EC_RES_INVALID_PARAM = 3, 471 EC_RES_ACCESS_DENIED = 4, 472 EC_RES_INVALID_RESPONSE = 5, 473 EC_RES_INVALID_VERSION = 6, 474 EC_RES_INVALID_CHECKSUM = 7, 475 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */ 476 EC_RES_UNAVAILABLE = 9, /* No response available */ 477 EC_RES_TIMEOUT = 10, /* We got a timeout */ 478 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 479 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 480 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 481 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 482 EC_RES_BUS_ERROR = 15, /* Communications bus error */ 483 EC_RES_BUSY = 16, /* Up but too busy. Should retry */ 484 EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ 485 EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ 486 EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ 487 EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ 488 }; 489 490 /* 491 * Host event codes. Note these are 1-based, not 0-based, because ACPI query 492 * EC command uses code 0 to mean "no event pending". We explicitly specify 493 * each value in the enum listing so they won't change if we delete/insert an 494 * item or rearrange the list (it needs to be stable across platforms, not 495 * just within a single compiled instance). 496 */ 497 enum host_event_code { 498 EC_HOST_EVENT_LID_CLOSED = 1, 499 EC_HOST_EVENT_LID_OPEN = 2, 500 EC_HOST_EVENT_POWER_BUTTON = 3, 501 EC_HOST_EVENT_AC_CONNECTED = 4, 502 EC_HOST_EVENT_AC_DISCONNECTED = 5, 503 EC_HOST_EVENT_BATTERY_LOW = 6, 504 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 505 EC_HOST_EVENT_BATTERY = 8, 506 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 507 /* Event generated by a device attached to the EC */ 508 EC_HOST_EVENT_DEVICE = 10, 509 EC_HOST_EVENT_THERMAL = 11, 510 EC_HOST_EVENT_USB_CHARGER = 12, 511 EC_HOST_EVENT_KEY_PRESSED = 13, 512 /* 513 * EC has finished initializing the host interface. The host can check 514 * for this event following sending a EC_CMD_REBOOT_EC command to 515 * determine when the EC is ready to accept subsequent commands. 516 */ 517 EC_HOST_EVENT_INTERFACE_READY = 14, 518 /* Keyboard recovery combo has been pressed */ 519 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15, 520 521 /* Shutdown due to thermal overload */ 522 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16, 523 /* Shutdown due to battery level too low */ 524 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17, 525 526 /* Suggest that the AP throttle itself */ 527 EC_HOST_EVENT_THROTTLE_START = 18, 528 /* Suggest that the AP resume normal speed */ 529 EC_HOST_EVENT_THROTTLE_STOP = 19, 530 531 /* Hang detect logic detected a hang and host event timeout expired */ 532 EC_HOST_EVENT_HANG_DETECT = 20, 533 /* Hang detect logic detected a hang and warm rebooted the AP */ 534 EC_HOST_EVENT_HANG_REBOOT = 21, 535 536 /* PD MCU triggering host event */ 537 EC_HOST_EVENT_PD_MCU = 22, 538 539 /* Battery Status flags have changed */ 540 EC_HOST_EVENT_BATTERY_STATUS = 23, 541 542 /* EC encountered a panic, triggering a reset */ 543 EC_HOST_EVENT_PANIC = 24, 544 545 /* Keyboard fastboot combo has been pressed */ 546 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 547 548 /* EC RTC event occurred */ 549 EC_HOST_EVENT_RTC = 26, 550 551 /* Emulate MKBP event */ 552 EC_HOST_EVENT_MKBP = 27, 553 554 /* EC desires to change state of host-controlled USB mux */ 555 EC_HOST_EVENT_USB_MUX = 28, 556 557 /* TABLET/LAPTOP mode or detachable base attach/detach event */ 558 EC_HOST_EVENT_MODE_CHANGE = 29, 559 560 /* Keyboard recovery combo with hardware reinitialization */ 561 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 562 563 /* WoV */ 564 EC_HOST_EVENT_WOV = 31, 565 566 /* 567 * The high bit of the event mask is not used as a host event code. If 568 * it reads back as set, then the entire event mask should be 569 * considered invalid by the host. This can happen when reading the 570 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is 571 * not initialized on the EC, or improperly configured on the host. 572 */ 573 EC_HOST_EVENT_INVALID = 32 574 }; 575 /* Host event mask */ 576 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) 577 578 /** 579 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS 580 * @flags: The host argument flags. 581 * @command_version: Command version. 582 * @data_size: The length of data. 583 * @checksum: Checksum; sum of command + flags + command_version + data_size + 584 * all params/response data bytes. 585 */ 586 struct ec_lpc_host_args { 587 uint8_t flags; 588 uint8_t command_version; 589 uint8_t data_size; 590 uint8_t checksum; 591 } __ec_align4; 592 593 /* Flags for ec_lpc_host_args.flags */ 594 /* 595 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command 596 * params. 597 * 598 * If EC gets a command and this flag is not set, this is an old-style command. 599 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 600 * unknown length. EC must respond with an old-style response (that is, 601 * without setting EC_HOST_ARGS_FLAG_TO_HOST). 602 */ 603 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 604 /* 605 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response. 606 * 607 * If EC responds to a command and this flag is not set, this is an old-style 608 * response. Command version is 0 and response data from EC is at 609 * EC_LPC_ADDR_OLD_PARAM with unknown length. 610 */ 611 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02 612 613 /*****************************************************************************/ 614 /* 615 * Byte codes returned by EC over SPI interface. 616 * 617 * These can be used by the AP to debug the EC interface, and to determine 618 * when the EC is not in a state where it will ever get around to responding 619 * to the AP. 620 * 621 * Example of sequence of bytes read from EC for a current good transfer: 622 * 1. - - AP asserts chip select (CS#) 623 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request 624 * 3. - - EC starts handling CS# interrupt 625 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request 626 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in 627 * bytes looking for EC_SPI_FRAME_START 628 * 6. - - EC finishes processing and sets up response 629 * 7. EC_SPI_FRAME_START - AP reads frame byte 630 * 8. (response packet) - AP reads response packet 631 * 9. EC_SPI_PAST_END - Any additional bytes read by AP 632 * 10 - - AP deasserts chip select 633 * 11 - - EC processes CS# interrupt and sets up DMA for 634 * next request 635 * 636 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than 637 * the following byte values: 638 * EC_SPI_OLD_READY 639 * EC_SPI_RX_READY 640 * EC_SPI_RECEIVING 641 * EC_SPI_PROCESSING 642 * 643 * Then the EC found an error in the request, or was not ready for the request 644 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START, 645 * because the EC is unable to tell when the AP is done sending its request. 646 */ 647 648 /* 649 * Framing byte which precedes a response packet from the EC. After sending a 650 * request, the AP will clock in bytes until it sees the framing byte, then 651 * clock in the response packet. 652 */ 653 #define EC_SPI_FRAME_START 0xec 654 655 /* 656 * Padding bytes which are clocked out after the end of a response packet. 657 */ 658 #define EC_SPI_PAST_END 0xed 659 660 /* 661 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects 662 * that the AP will send a valid packet header (starting with 663 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes. 664 */ 665 #define EC_SPI_RX_READY 0xf8 666 667 /* 668 * EC has started receiving the request from the AP, but hasn't started 669 * processing it yet. 670 */ 671 #define EC_SPI_RECEIVING 0xf9 672 673 /* EC has received the entire request from the AP and is processing it. */ 674 #define EC_SPI_PROCESSING 0xfa 675 676 /* 677 * EC received bad data from the AP, such as a packet header with an invalid 678 * length. EC will ignore all data until chip select deasserts. 679 */ 680 #define EC_SPI_RX_BAD_DATA 0xfb 681 682 /* 683 * EC received data from the AP before it was ready. That is, the AP asserted 684 * chip select and started clocking data before the EC was ready to receive it. 685 * EC will ignore all data until chip select deasserts. 686 */ 687 #define EC_SPI_NOT_READY 0xfc 688 689 /* 690 * EC was ready to receive a request from the AP. EC has treated the byte sent 691 * by the AP as part of a request packet, or (for old-style ECs) is processing 692 * a fully received packet but is not ready to respond yet. 693 */ 694 #define EC_SPI_OLD_READY 0xfd 695 696 /*****************************************************************************/ 697 698 /* 699 * Protocol version 2 for I2C and SPI send a request this way: 700 * 701 * 0 EC_CMD_VERSION0 + (command version) 702 * 1 Command number 703 * 2 Length of params = N 704 * 3..N+2 Params, if any 705 * N+3 8-bit checksum of bytes 0..N+2 706 * 707 * The corresponding response is: 708 * 709 * 0 Result code (EC_RES_*) 710 * 1 Length of params = M 711 * 2..M+1 Params, if any 712 * M+2 8-bit checksum of bytes 0..M+1 713 */ 714 #define EC_PROTO2_REQUEST_HEADER_BYTES 3 715 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1 716 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \ 717 EC_PROTO2_REQUEST_TRAILER_BYTES) 718 719 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2 720 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1 721 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \ 722 EC_PROTO2_RESPONSE_TRAILER_BYTES) 723 724 /* Parameter length was limited by the LPC interface */ 725 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc 726 727 /* Maximum request and response packet sizes for protocol version 2 */ 728 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \ 729 EC_PROTO2_MAX_PARAM_SIZE) 730 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \ 731 EC_PROTO2_MAX_PARAM_SIZE) 732 733 /*****************************************************************************/ 734 735 /* 736 * Value written to legacy command port / prefix byte to indicate protocol 737 * 3+ structs are being used. Usage is bus-dependent. 738 */ 739 #define EC_COMMAND_PROTOCOL_3 0xda 740 741 #define EC_HOST_REQUEST_VERSION 3 742 743 /** 744 * struct ec_host_request - Version 3 request from host. 745 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it 746 * receives a header with a version it doesn't know how to 747 * parse. 748 * @checksum: Checksum of request and data; sum of all bytes including checksum 749 * should total to 0. 750 * @command: Command to send (EC_CMD_...) 751 * @command_version: Command version. 752 * @reserved: Unused byte in current protocol version; set to 0. 753 * @data_len: Length of data which follows this header. 754 */ 755 struct ec_host_request { 756 uint8_t struct_version; 757 uint8_t checksum; 758 uint16_t command; 759 uint8_t command_version; 760 uint8_t reserved; 761 uint16_t data_len; 762 } __ec_align4; 763 764 #define EC_HOST_RESPONSE_VERSION 3 765 766 /** 767 * struct ec_host_response - Version 3 response from EC. 768 * @struct_version: Struct version (=3). 769 * @checksum: Checksum of response and data; sum of all bytes including 770 * checksum should total to 0. 771 * @result: EC's response to the command (separate from communication failure) 772 * @data_len: Length of data which follows this header. 773 * @reserved: Unused bytes in current protocol version; set to 0. 774 */ 775 struct ec_host_response { 776 uint8_t struct_version; 777 uint8_t checksum; 778 uint16_t result; 779 uint16_t data_len; 780 uint16_t reserved; 781 } __ec_align4; 782 783 /*****************************************************************************/ 784 785 /* 786 * Host command protocol V4. 787 * 788 * Packets always start with a request or response header. They are followed 789 * by data_len bytes of data. If the data_crc_present flag is set, the data 790 * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1 791 * polynomial. 792 * 793 * Host algorithm when sending a request q: 794 * 795 * 101) tries_left=(some value, e.g. 3); 796 * 102) q.seq_num++ 797 * 103) q.seq_dup=0 798 * 104) Calculate q.header_crc. 799 * 105) Send request q to EC. 800 * 106) Wait for response r. Go to 201 if received or 301 if timeout. 801 * 802 * 201) If r.struct_version != 4, go to 301. 803 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. 804 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. 805 * 204) If r.seq_num != q.seq_num, go to 301. 806 * 205) If r.seq_dup == q.seq_dup, return success. 807 * 207) If r.seq_dup == 1, go to 301. 808 * 208) Return error. 809 * 810 * 301) If --tries_left <= 0, return error. 811 * 302) If q.seq_dup == 1, go to 105. 812 * 303) q.seq_dup = 1 813 * 304) Go to 104. 814 * 815 * EC algorithm when receiving a request q. 816 * EC has response buffer r, error buffer e. 817 * 818 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION 819 * and go to 301 820 * 102) If q.header_crc mismatches calculated CRC, set e.result = 821 * EC_RES_INVALID_HEADER_CRC and go to 301 822 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC 823 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC 824 * and go to 301. 825 * 104) If q.seq_dup == 0, go to 201. 826 * 105) If q.seq_num != r.seq_num, go to 201. 827 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. 828 * 829 * 201) Process request q into response r. 830 * 202) r.seq_num = q.seq_num 831 * 203) r.seq_dup = q.seq_dup 832 * 204) Calculate r.header_crc 833 * 205) If r.data_len > 0 and data is no longer available, set e.result = 834 * EC_RES_DUP_UNAVAILABLE and go to 301. 835 * 206) Send response r. 836 * 837 * 301) e.seq_num = q.seq_num 838 * 302) e.seq_dup = q.seq_dup 839 * 303) Calculate e.header_crc. 840 * 304) Send error response e. 841 */ 842 843 /* Version 4 request from host */ 844 struct ec_host_request4 { 845 /* 846 * bits 0-3: struct_version: Structure version (=4) 847 * bit 4: is_response: Is response (=0) 848 * bits 5-6: seq_num: Sequence number 849 * bit 7: seq_dup: Sequence duplicate flag 850 */ 851 uint8_t fields0; 852 853 /* 854 * bits 0-4: command_version: Command version 855 * bits 5-6: Reserved (set 0, ignore on read) 856 * bit 7: data_crc_present: Is data CRC present after data 857 */ 858 uint8_t fields1; 859 860 /* Command code (EC_CMD_*) */ 861 uint16_t command; 862 863 /* Length of data which follows this header (not including data CRC) */ 864 uint16_t data_len; 865 866 /* Reserved (set 0, ignore on read) */ 867 uint8_t reserved; 868 869 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 870 uint8_t header_crc; 871 } __ec_align4; 872 873 /* Version 4 response from EC */ 874 struct ec_host_response4 { 875 /* 876 * bits 0-3: struct_version: Structure version (=4) 877 * bit 4: is_response: Is response (=1) 878 * bits 5-6: seq_num: Sequence number 879 * bit 7: seq_dup: Sequence duplicate flag 880 */ 881 uint8_t fields0; 882 883 /* 884 * bits 0-6: Reserved (set 0, ignore on read) 885 * bit 7: data_crc_present: Is data CRC present after data 886 */ 887 uint8_t fields1; 888 889 /* Result code (EC_RES_*) */ 890 uint16_t result; 891 892 /* Length of data which follows this header (not including data CRC) */ 893 uint16_t data_len; 894 895 /* Reserved (set 0, ignore on read) */ 896 uint8_t reserved; 897 898 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 899 uint8_t header_crc; 900 } __ec_align4; 901 902 /* Fields in fields0 byte */ 903 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f 904 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 905 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 906 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 907 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 908 909 /* Fields in fields1 byte */ 910 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ 911 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 912 913 /*****************************************************************************/ 914 /* 915 * Notes on commands: 916 * 917 * Each command is an 16-bit command value. Commands which take params or 918 * return response data specify structures for that data. If no structure is 919 * specified, the command does not input or output data, respectively. 920 * Parameter/response length is implicit in the structs. Some underlying 921 * communication protocols (I2C, SPI) may add length or checksum headers, but 922 * those are implementation-dependent and not defined here. 923 * 924 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 925 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 926 */ 927 928 /*****************************************************************************/ 929 /* General / test commands */ 930 931 /* 932 * Get protocol version, used to deal with non-backward compatible protocol 933 * changes. 934 */ 935 #define EC_CMD_PROTO_VERSION 0x0000 936 937 /** 938 * struct ec_response_proto_version - Response to the proto version command. 939 * @version: The protocol version. 940 */ 941 struct ec_response_proto_version { 942 uint32_t version; 943 } __ec_align4; 944 945 /* 946 * Hello. This is a simple command to test the EC is responsive to 947 * commands. 948 */ 949 #define EC_CMD_HELLO 0x0001 950 951 /** 952 * struct ec_params_hello - Parameters to the hello command. 953 * @in_data: Pass anything here. 954 */ 955 struct ec_params_hello { 956 uint32_t in_data; 957 } __ec_align4; 958 959 /** 960 * struct ec_response_hello - Response to the hello command. 961 * @out_data: Output will be in_data + 0x01020304. 962 */ 963 struct ec_response_hello { 964 uint32_t out_data; 965 } __ec_align4; 966 967 /* Get version number */ 968 #define EC_CMD_GET_VERSION 0x0002 969 970 enum ec_current_image { 971 EC_IMAGE_UNKNOWN = 0, 972 EC_IMAGE_RO, 973 EC_IMAGE_RW 974 }; 975 976 /** 977 * struct ec_response_get_version - Response to the get version command. 978 * @version_string_ro: Null-terminated RO firmware version string. 979 * @version_string_rw: Null-terminated RW firmware version string. 980 * @reserved: Unused bytes; was previously RW-B firmware version string. 981 * @current_image: One of ec_current_image. 982 */ 983 struct ec_response_get_version { 984 char version_string_ro[32]; 985 char version_string_rw[32]; 986 char reserved[32]; 987 uint32_t current_image; 988 } __ec_align4; 989 990 /* Read test */ 991 #define EC_CMD_READ_TEST 0x0003 992 993 /** 994 * struct ec_params_read_test - Parameters for the read test command. 995 * @offset: Starting value for read buffer. 996 * @size: Size to read in bytes. 997 */ 998 struct ec_params_read_test { 999 uint32_t offset; 1000 uint32_t size; 1001 } __ec_align4; 1002 1003 /** 1004 * struct ec_response_read_test - Response to the read test command. 1005 * @data: Data returned by the read test command. 1006 */ 1007 struct ec_response_read_test { 1008 uint32_t data[32]; 1009 } __ec_align4; 1010 1011 /* 1012 * Get build information 1013 * 1014 * Response is null-terminated string. 1015 */ 1016 #define EC_CMD_GET_BUILD_INFO 0x0004 1017 1018 /* Get chip info */ 1019 #define EC_CMD_GET_CHIP_INFO 0x0005 1020 1021 /** 1022 * struct ec_response_get_chip_info - Response to the get chip info command. 1023 * @vendor: Null-terminated string for chip vendor. 1024 * @name: Null-terminated string for chip name. 1025 * @revision: Null-terminated string for chip mask version. 1026 */ 1027 struct ec_response_get_chip_info { 1028 char vendor[32]; 1029 char name[32]; 1030 char revision[32]; 1031 } __ec_align4; 1032 1033 /* Get board HW version */ 1034 #define EC_CMD_GET_BOARD_VERSION 0x0006 1035 1036 /** 1037 * struct ec_response_board_version - Response to the board version command. 1038 * @board_version: A monotonously incrementing number. 1039 */ 1040 struct ec_response_board_version { 1041 uint16_t board_version; 1042 } __ec_align2; 1043 1044 /* 1045 * Read memory-mapped data. 1046 * 1047 * This is an alternate interface to memory-mapped data for bus protocols 1048 * which don't support direct-mapped memory - I2C, SPI, etc. 1049 * 1050 * Response is params.size bytes of data. 1051 */ 1052 #define EC_CMD_READ_MEMMAP 0x0007 1053 1054 /** 1055 * struct ec_params_read_memmap - Parameters for the read memory map command. 1056 * @offset: Offset in memmap (EC_MEMMAP_*). 1057 * @size: Size to read in bytes. 1058 */ 1059 struct ec_params_read_memmap { 1060 uint8_t offset; 1061 uint8_t size; 1062 } __ec_align1; 1063 1064 /* Read versions supported for a command */ 1065 #define EC_CMD_GET_CMD_VERSIONS 0x0008 1066 1067 /** 1068 * struct ec_params_get_cmd_versions - Parameters for the get command versions. 1069 * @cmd: Command to check. 1070 */ 1071 struct ec_params_get_cmd_versions { 1072 uint8_t cmd; 1073 } __ec_align1; 1074 1075 /** 1076 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command 1077 * versions (v1) 1078 * @cmd: Command to check. 1079 */ 1080 struct ec_params_get_cmd_versions_v1 { 1081 uint16_t cmd; 1082 } __ec_align2; 1083 1084 /** 1085 * struct ec_response_get_cmd_versions - Response to the get command versions. 1086 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with 1087 * a desired version. 1088 */ 1089 struct ec_response_get_cmd_versions { 1090 uint32_t version_mask; 1091 } __ec_align4; 1092 1093 /* 1094 * Check EC communications status (busy). This is needed on i2c/spi but not 1095 * on lpc since it has its own out-of-band busy indicator. 1096 * 1097 * lpc must read the status from the command register. Attempting this on 1098 * lpc will overwrite the args/parameter space and corrupt its data. 1099 */ 1100 #define EC_CMD_GET_COMMS_STATUS 0x0009 1101 1102 /* Avoid using ec_status which is for return values */ 1103 enum ec_comms_status { 1104 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ 1105 }; 1106 1107 /** 1108 * struct ec_response_get_comms_status - Response to the get comms status 1109 * command. 1110 * @flags: Mask of enum ec_comms_status. 1111 */ 1112 struct ec_response_get_comms_status { 1113 uint32_t flags; /* Mask of enum ec_comms_status */ 1114 } __ec_align4; 1115 1116 /* Fake a variety of responses, purely for testing purposes. */ 1117 #define EC_CMD_TEST_PROTOCOL 0x000A 1118 1119 /* Tell the EC what to send back to us. */ 1120 struct ec_params_test_protocol { 1121 uint32_t ec_result; 1122 uint32_t ret_len; 1123 uint8_t buf[32]; 1124 } __ec_align4; 1125 1126 /* Here it comes... */ 1127 struct ec_response_test_protocol { 1128 uint8_t buf[32]; 1129 } __ec_align4; 1130 1131 /* Get protocol information */ 1132 #define EC_CMD_GET_PROTOCOL_INFO 0x000B 1133 1134 /* Flags for ec_response_get_protocol_info.flags */ 1135 /* EC_RES_IN_PROGRESS may be returned if a command is slow */ 1136 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) 1137 1138 /** 1139 * struct ec_response_get_protocol_info - Response to the get protocol info. 1140 * @protocol_versions: Bitmask of protocol versions supported (1 << n means 1141 * version n). 1142 * @max_request_packet_size: Maximum request packet size in bytes. 1143 * @max_response_packet_size: Maximum response packet size in bytes. 1144 * @flags: see EC_PROTOCOL_INFO_* 1145 */ 1146 struct ec_response_get_protocol_info { 1147 /* Fields which exist if at least protocol version 3 supported */ 1148 uint32_t protocol_versions; 1149 uint16_t max_request_packet_size; 1150 uint16_t max_response_packet_size; 1151 uint32_t flags; 1152 } __ec_align4; 1153 1154 1155 /*****************************************************************************/ 1156 /* Get/Set miscellaneous values */ 1157 1158 /* The upper byte of .flags tells what to do (nothing means "get") */ 1159 #define EC_GSV_SET 0x80000000 1160 1161 /* 1162 * The lower three bytes of .flags identifies the parameter, if that has 1163 * meaning for an individual command. 1164 */ 1165 #define EC_GSV_PARAM_MASK 0x00ffffff 1166 1167 struct ec_params_get_set_value { 1168 uint32_t flags; 1169 uint32_t value; 1170 } __ec_align4; 1171 1172 struct ec_response_get_set_value { 1173 uint32_t flags; 1174 uint32_t value; 1175 } __ec_align4; 1176 1177 /* More than one command can use these structs to get/set parameters. */ 1178 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1179 1180 /*****************************************************************************/ 1181 /* List the features supported by the firmware */ 1182 #define EC_CMD_GET_FEATURES 0x000D 1183 1184 /* Supported features */ 1185 enum ec_feature_code { 1186 /* 1187 * This image contains a limited set of features. Another image 1188 * in RW partition may support more features. 1189 */ 1190 EC_FEATURE_LIMITED = 0, 1191 /* 1192 * Commands for probing/reading/writing/erasing the flash in the 1193 * EC are present. 1194 */ 1195 EC_FEATURE_FLASH = 1, 1196 /* 1197 * Can control the fan speed directly. 1198 */ 1199 EC_FEATURE_PWM_FAN = 2, 1200 /* 1201 * Can control the intensity of the keyboard backlight. 1202 */ 1203 EC_FEATURE_PWM_KEYB = 3, 1204 /* 1205 * Support Google lightbar, introduced on Pixel. 1206 */ 1207 EC_FEATURE_LIGHTBAR = 4, 1208 /* Control of LEDs */ 1209 EC_FEATURE_LED = 5, 1210 /* Exposes an interface to control gyro and sensors. 1211 * The host goes through the EC to access these sensors. 1212 * In addition, the EC may provide composite sensors, like lid angle. 1213 */ 1214 EC_FEATURE_MOTION_SENSE = 6, 1215 /* The keyboard is controlled by the EC */ 1216 EC_FEATURE_KEYB = 7, 1217 /* The AP can use part of the EC flash as persistent storage. */ 1218 EC_FEATURE_PSTORE = 8, 1219 /* The EC monitors BIOS port 80h, and can return POST codes. */ 1220 EC_FEATURE_PORT80 = 9, 1221 /* 1222 * Thermal management: include TMP specific commands. 1223 * Higher level than direct fan control. 1224 */ 1225 EC_FEATURE_THERMAL = 10, 1226 /* Can switch the screen backlight on/off */ 1227 EC_FEATURE_BKLIGHT_SWITCH = 11, 1228 /* Can switch the wifi module on/off */ 1229 EC_FEATURE_WIFI_SWITCH = 12, 1230 /* Monitor host events, through for example SMI or SCI */ 1231 EC_FEATURE_HOST_EVENTS = 13, 1232 /* The EC exposes GPIO commands to control/monitor connected devices. */ 1233 EC_FEATURE_GPIO = 14, 1234 /* The EC can send i2c messages to downstream devices. */ 1235 EC_FEATURE_I2C = 15, 1236 /* Command to control charger are included */ 1237 EC_FEATURE_CHARGER = 16, 1238 /* Simple battery support. */ 1239 EC_FEATURE_BATTERY = 17, 1240 /* 1241 * Support Smart battery protocol 1242 * (Common Smart Battery System Interface Specification) 1243 */ 1244 EC_FEATURE_SMART_BATTERY = 18, 1245 /* EC can detect when the host hangs. */ 1246 EC_FEATURE_HANG_DETECT = 19, 1247 /* Report power information, for pit only */ 1248 EC_FEATURE_PMU = 20, 1249 /* Another Cros EC device is present downstream of this one */ 1250 EC_FEATURE_SUB_MCU = 21, 1251 /* Support USB Power delivery (PD) commands */ 1252 EC_FEATURE_USB_PD = 22, 1253 /* Control USB multiplexer, for audio through USB port for instance. */ 1254 EC_FEATURE_USB_MUX = 23, 1255 /* Motion Sensor code has an internal software FIFO */ 1256 EC_FEATURE_MOTION_SENSE_FIFO = 24, 1257 /* Support temporary secure vstore */ 1258 EC_FEATURE_VSTORE = 25, 1259 /* EC decides on USB-C SS mux state, muxes configured by host */ 1260 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26, 1261 /* EC has RTC feature that can be controlled by host commands */ 1262 EC_FEATURE_RTC = 27, 1263 /* The MCU exposes a Fingerprint sensor */ 1264 EC_FEATURE_FINGERPRINT = 28, 1265 /* The MCU exposes a Touchpad */ 1266 EC_FEATURE_TOUCHPAD = 29, 1267 /* The MCU has RWSIG task enabled */ 1268 EC_FEATURE_RWSIG = 30, 1269 /* EC has device events support */ 1270 EC_FEATURE_DEVICE_EVENT = 31, 1271 /* EC supports the unified wake masks for LPC/eSPI systems */ 1272 EC_FEATURE_UNIFIED_WAKE_MASKS = 32, 1273 /* EC supports 64-bit host events */ 1274 EC_FEATURE_HOST_EVENT64 = 33, 1275 /* EC runs code in RAM (not in place, a.k.a. XIP) */ 1276 EC_FEATURE_EXEC_IN_RAM = 34, 1277 /* EC supports CEC commands */ 1278 EC_FEATURE_CEC = 35, 1279 /* EC supports tight sensor timestamping. */ 1280 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36, 1281 /* 1282 * EC supports tablet mode detection aligned to Chrome and allows 1283 * setting of threshold by host command using 1284 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. 1285 */ 1286 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, 1287 /* The MCU is a System Companion Processor (SCP). */ 1288 EC_FEATURE_SCP = 39, 1289 /* The MCU is an Integrated Sensor Hub */ 1290 EC_FEATURE_ISH = 40, 1291 /* New TCPMv2 TYPEC_ prefaced commands supported */ 1292 EC_FEATURE_TYPEC_CMD = 41, 1293 /* 1294 * The EC will wait for direction from the AP to enter Type-C alternate 1295 * modes or USB4. 1296 */ 1297 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42, 1298 /* 1299 * The EC will wait for an acknowledge from the AP after setting the 1300 * mux. 1301 */ 1302 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43, 1303 /* 1304 * The EC supports entering and residing in S4. 1305 */ 1306 EC_FEATURE_S4_RESIDENCY = 44, 1307 /* 1308 * The EC supports the AP directing mux sets for the board. 1309 */ 1310 EC_FEATURE_TYPEC_AP_MUX_SET = 45, 1311 /* 1312 * The EC supports the AP composing VDMs for us to send. 1313 */ 1314 EC_FEATURE_TYPEC_AP_VDM_SEND = 46, 1315 /* 1316 * The EC supports system safe mode panic recovery. 1317 */ 1318 EC_FEATURE_SYSTEM_SAFE_MODE = 47, 1319 /* 1320 * The EC will reboot on runtime assertion failures. 1321 */ 1322 EC_FEATURE_ASSERT_REBOOTS = 48, 1323 /* 1324 * The EC image is built with tokenized logging enabled. 1325 */ 1326 EC_FEATURE_TOKENIZED_LOGGING = 49, 1327 /* 1328 * The EC supports triggering an STB dump. 1329 */ 1330 EC_FEATURE_AMD_STB_DUMP = 50, 1331 /* 1332 * The EC supports memory dump commands. 1333 */ 1334 EC_FEATURE_MEMORY_DUMP = 51, 1335 /* 1336 * The EC supports DP2.1 capability 1337 */ 1338 EC_FEATURE_TYPEC_DP2_1 = 52, 1339 /* 1340 * The MCU is System Companion Processor Core 1 1341 */ 1342 EC_FEATURE_SCP_C1 = 53, 1343 /* 1344 * The EC supports UCSI PPM. 1345 */ 1346 EC_FEATURE_UCSI_PPM = 54, 1347 }; 1348 1349 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) 1350 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) 1351 1352 struct ec_response_get_features { 1353 uint32_t flags[2]; 1354 } __ec_align4; 1355 1356 /*****************************************************************************/ 1357 /* Get the board's SKU ID from EC */ 1358 #define EC_CMD_GET_SKU_ID 0x000E 1359 1360 /* Set SKU ID from AP */ 1361 #define EC_CMD_SET_SKU_ID 0x000F 1362 1363 struct ec_sku_id_info { 1364 uint32_t sku_id; 1365 } __ec_align4; 1366 1367 /*****************************************************************************/ 1368 /* Flash commands */ 1369 1370 /* Get flash info */ 1371 #define EC_CMD_FLASH_INFO 0x0010 1372 #define EC_VER_FLASH_INFO 2 1373 1374 /** 1375 * struct ec_response_flash_info - Response to the flash info command. 1376 * @flash_size: Usable flash size in bytes. 1377 * @write_block_size: Write block size. Write offset and size must be a 1378 * multiple of this. 1379 * @erase_block_size: Erase block size. Erase offset and size must be a 1380 * multiple of this. 1381 * @protect_block_size: Protection block size. Protection offset and size 1382 * must be a multiple of this. 1383 * 1384 * Version 0 returns these fields. 1385 */ 1386 struct ec_response_flash_info { 1387 uint32_t flash_size; 1388 uint32_t write_block_size; 1389 uint32_t erase_block_size; 1390 uint32_t protect_block_size; 1391 } __ec_align4; 1392 1393 /* 1394 * Flags for version 1+ flash info command 1395 * EC flash erases bits to 0 instead of 1. 1396 */ 1397 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) 1398 1399 /* 1400 * Flash must be selected for read/write/erase operations to succeed. This may 1401 * be necessary on a chip where write/erase can be corrupted by other board 1402 * activity, or where the chip needs to enable some sort of programming voltage, 1403 * or where the read/write/erase operations require cleanly suspending other 1404 * chip functionality. 1405 */ 1406 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) 1407 1408 /** 1409 * struct ec_response_flash_info_1 - Response to the flash info v1 command. 1410 * @flash_size: Usable flash size in bytes. 1411 * @write_block_size: Write block size. Write offset and size must be a 1412 * multiple of this. 1413 * @erase_block_size: Erase block size. Erase offset and size must be a 1414 * multiple of this. 1415 * @protect_block_size: Protection block size. Protection offset and size 1416 * must be a multiple of this. 1417 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if 1418 * size is exactly this and offset is a multiple of this. 1419 * For example, an EC may have a write buffer which can do 1420 * half-page operations if data is aligned, and a slower 1421 * word-at-a-time write mode. 1422 * @flags: Flags; see EC_FLASH_INFO_* 1423 * 1424 * Version 1 returns the same initial fields as version 0, with additional 1425 * fields following. 1426 * 1427 * gcc anonymous structs don't seem to get along with the __packed directive; 1428 * if they did we'd define the version 0 structure as a sub-structure of this 1429 * one. 1430 * 1431 * Version 2 supports flash banks of different sizes: 1432 * The caller specified the number of banks it has preallocated 1433 * (num_banks_desc) 1434 * The EC returns the number of banks describing the flash memory. 1435 * It adds banks descriptions up to num_banks_desc. 1436 */ 1437 struct ec_response_flash_info_1 { 1438 /* Version 0 fields; see above for description */ 1439 uint32_t flash_size; 1440 uint32_t write_block_size; 1441 uint32_t erase_block_size; 1442 uint32_t protect_block_size; 1443 1444 /* Version 1 adds these fields: */ 1445 uint32_t write_ideal_size; 1446 uint32_t flags; 1447 } __ec_align4; 1448 1449 struct ec_params_flash_info_2 { 1450 /* Number of banks to describe */ 1451 uint16_t num_banks_desc; 1452 /* Reserved; set 0; ignore on read */ 1453 uint8_t reserved[2]; 1454 } __ec_align4; 1455 1456 struct ec_flash_bank { 1457 /* Number of sector is in this bank. */ 1458 uint16_t count; 1459 /* Size in power of 2 of each sector (8 --> 256 bytes) */ 1460 uint8_t size_exp; 1461 /* Minimal write size for the sectors in this bank */ 1462 uint8_t write_size_exp; 1463 /* Erase size for the sectors in this bank */ 1464 uint8_t erase_size_exp; 1465 /* Size for write protection, usually identical to erase size. */ 1466 uint8_t protect_size_exp; 1467 /* Reserved; set 0; ignore on read */ 1468 uint8_t reserved[2]; 1469 }; 1470 1471 struct ec_response_flash_info_2 { 1472 /* Total flash in the EC. */ 1473 uint32_t flash_size; 1474 /* Flags; see EC_FLASH_INFO_* */ 1475 uint32_t flags; 1476 /* Maximum size to use to send data to write to the EC. */ 1477 uint32_t write_ideal_size; 1478 /* Number of banks present in the EC. */ 1479 uint16_t num_banks_total; 1480 /* Number of banks described in banks array. */ 1481 uint16_t num_banks_desc; 1482 struct ec_flash_bank banks[]; 1483 } __ec_align4; 1484 1485 /* 1486 * Read flash 1487 * 1488 * Response is params.size bytes of data. 1489 */ 1490 #define EC_CMD_FLASH_READ 0x0011 1491 1492 /** 1493 * struct ec_params_flash_read - Parameters for the flash read command. 1494 * @offset: Byte offset to read. 1495 * @size: Size to read in bytes. 1496 */ 1497 struct ec_params_flash_read { 1498 uint32_t offset; 1499 uint32_t size; 1500 } __ec_align4; 1501 1502 /* Write flash */ 1503 #define EC_CMD_FLASH_WRITE 0x0012 1504 #define EC_VER_FLASH_WRITE 1 1505 1506 /* Version 0 of the flash command supported only 64 bytes of data */ 1507 #define EC_FLASH_WRITE_VER0_SIZE 64 1508 1509 /** 1510 * struct ec_params_flash_write - Parameters for the flash write command. 1511 * @offset: Byte offset to write. 1512 * @size: Size to write in bytes. 1513 */ 1514 struct ec_params_flash_write { 1515 uint32_t offset; 1516 uint32_t size; 1517 /* Followed by data to write */ 1518 } __ec_align4; 1519 1520 /* Erase flash */ 1521 #define EC_CMD_FLASH_ERASE 0x0013 1522 1523 /** 1524 * struct ec_params_flash_erase - Parameters for the flash erase command, v0. 1525 * @offset: Byte offset to erase. 1526 * @size: Size to erase in bytes. 1527 */ 1528 struct ec_params_flash_erase { 1529 uint32_t offset; 1530 uint32_t size; 1531 } __ec_align4; 1532 1533 /* 1534 * v1 add async erase: 1535 * subcommands can returns: 1536 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1537 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1538 * EC_RES_ERROR : other errors. 1539 * EC_RES_BUSY : an existing erase operation is in progress. 1540 * EC_RES_ACCESS_DENIED: Trying to erase running image. 1541 * 1542 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1543 * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1544 * the proper result. 1545 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1546 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1547 * ERASE_GET_RESULT command may timeout on EC where flash access is not 1548 * permitted while erasing. (For instance, STM32F4). 1549 */ 1550 enum ec_flash_erase_cmd { 1551 FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1552 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1553 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1554 }; 1555 1556 /** 1557 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. 1558 * @cmd: One of ec_flash_erase_cmd. 1559 * @reserved: Pad byte; currently always contains 0. 1560 * @flag: No flags defined yet; set to 0. 1561 * @params: Same as v0 parameters. 1562 */ 1563 struct ec_params_flash_erase_v1 { 1564 uint8_t cmd; 1565 uint8_t reserved; 1566 uint16_t flag; 1567 struct ec_params_flash_erase params; 1568 } __ec_align4; 1569 1570 /* 1571 * Get/set flash protection. 1572 * 1573 * If mask!=0, sets/clear the requested bits of flags. Depending on the 1574 * firmware write protect GPIO, not all flags will take effect immediately; 1575 * some flags require a subsequent hard reset to take effect. Check the 1576 * returned flags bits to see what actually happened. 1577 * 1578 * If mask=0, simply returns the current flags state. 1579 */ 1580 #define EC_CMD_FLASH_PROTECT 0x0015 1581 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1582 1583 /* Flags for flash protection */ 1584 /* RO flash code protected when the EC boots */ 1585 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) 1586 /* 1587 * RO flash code protected now. If this bit is set, at-boot status cannot 1588 * be changed. 1589 */ 1590 #define EC_FLASH_PROTECT_RO_NOW BIT(1) 1591 /* Entire flash code protected now, until reboot. */ 1592 #define EC_FLASH_PROTECT_ALL_NOW BIT(2) 1593 /* Flash write protect GPIO is asserted now */ 1594 #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) 1595 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1596 #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) 1597 /* 1598 * Error - flash protection is in inconsistent state. At least one bank of 1599 * flash which should be protected is not protected. Usually fixed by 1600 * re-requesting the desired flags, or by a hard reset if that fails. 1601 */ 1602 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) 1603 /* Entire flash code protected when the EC boots */ 1604 #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) 1605 /* RW flash code protected when the EC boots */ 1606 #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) 1607 /* RW flash code protected now. */ 1608 #define EC_FLASH_PROTECT_RW_NOW BIT(8) 1609 /* Rollback information flash region protected when the EC boots */ 1610 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) 1611 /* Rollback information flash region protected now */ 1612 #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) 1613 1614 1615 /** 1616 * struct ec_params_flash_protect - Parameters for the flash protect command. 1617 * @mask: Bits in flags to apply. 1618 * @flags: New flags to apply. 1619 */ 1620 struct ec_params_flash_protect { 1621 uint32_t mask; 1622 uint32_t flags; 1623 } __ec_align4; 1624 1625 /** 1626 * struct ec_response_flash_protect - Response to the flash protect command. 1627 * @flags: Current value of flash protect flags. 1628 * @valid_flags: Flags which are valid on this platform. This allows the 1629 * caller to distinguish between flags which aren't set vs. flags 1630 * which can't be set on this platform. 1631 * @writable_flags: Flags which can be changed given the current protection 1632 * state. 1633 */ 1634 struct ec_response_flash_protect { 1635 uint32_t flags; 1636 uint32_t valid_flags; 1637 uint32_t writable_flags; 1638 } __ec_align4; 1639 1640 /* 1641 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash 1642 * write protect. These commands may be reused with version > 0. 1643 */ 1644 1645 /* Get the region offset/size */ 1646 #define EC_CMD_FLASH_REGION_INFO 0x0016 1647 #define EC_VER_FLASH_REGION_INFO 1 1648 1649 enum ec_flash_region { 1650 /* Region which holds read-only EC image */ 1651 EC_FLASH_REGION_RO = 0, 1652 /* 1653 * Region which holds active RW image. 'Active' is different from 1654 * 'running'. Active means 'scheduled-to-run'. Since RO image always 1655 * scheduled to run, active/non-active applies only to RW images (for 1656 * the same reason 'update' applies only to RW images. It's a state of 1657 * an image on a flash. Running image can be RO, RW_A, RW_B but active 1658 * image can only be RW_A or RW_B. In recovery mode, an active RW image 1659 * doesn't enter 'running' state but it's still active on a flash. 1660 */ 1661 EC_FLASH_REGION_ACTIVE, 1662 /* 1663 * Region which should be write-protected in the factory (a superset of 1664 * EC_FLASH_REGION_RO) 1665 */ 1666 EC_FLASH_REGION_WP_RO, 1667 /* Region which holds updatable (non-active) RW image */ 1668 EC_FLASH_REGION_UPDATE, 1669 /* Number of regions */ 1670 EC_FLASH_REGION_COUNT, 1671 }; 1672 /* 1673 * 'RW' is vague if there are multiple RW images; we mean the active one, 1674 * so the old constant is deprecated. 1675 */ 1676 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE 1677 1678 /** 1679 * struct ec_params_flash_region_info - Parameters for the flash region info 1680 * command. 1681 * @region: Flash region; see EC_FLASH_REGION_* 1682 */ 1683 struct ec_params_flash_region_info { 1684 uint32_t region; 1685 } __ec_align4; 1686 1687 struct ec_response_flash_region_info { 1688 uint32_t offset; 1689 uint32_t size; 1690 } __ec_align4; 1691 1692 /* Read/write VbNvContext */ 1693 #define EC_CMD_VBNV_CONTEXT 0x0017 1694 #define EC_VER_VBNV_CONTEXT 1 1695 #define EC_VBNV_BLOCK_SIZE 16 1696 1697 enum ec_vbnvcontext_op { 1698 EC_VBNV_CONTEXT_OP_READ, 1699 EC_VBNV_CONTEXT_OP_WRITE, 1700 }; 1701 1702 struct ec_params_vbnvcontext { 1703 uint32_t op; 1704 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1705 } __ec_align4; 1706 1707 struct ec_response_vbnvcontext { 1708 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1709 } __ec_align4; 1710 1711 1712 /* Get SPI flash information */ 1713 #define EC_CMD_FLASH_SPI_INFO 0x0018 1714 1715 struct ec_response_flash_spi_info { 1716 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1717 uint8_t jedec[3]; 1718 1719 /* Pad byte; currently always contains 0 */ 1720 uint8_t reserved0; 1721 1722 /* Manufacturer / device ID from command 0x90 */ 1723 uint8_t mfr_dev_id[2]; 1724 1725 /* Status registers from command 0x05 and 0x35 */ 1726 uint8_t sr1, sr2; 1727 } __ec_align1; 1728 1729 1730 /* Select flash during flash operations */ 1731 #define EC_CMD_FLASH_SELECT 0x0019 1732 1733 /** 1734 * struct ec_params_flash_select - Parameters for the flash select command. 1735 * @select: 1 to select flash, 0 to deselect flash 1736 */ 1737 struct ec_params_flash_select { 1738 uint8_t select; 1739 } __ec_align4; 1740 1741 1742 /*****************************************************************************/ 1743 /* PWM commands */ 1744 1745 /* Get fan target RPM */ 1746 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1747 1748 struct ec_response_pwm_get_fan_rpm { 1749 uint32_t rpm; 1750 } __ec_align4; 1751 1752 /* Set target fan RPM */ 1753 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1754 1755 /* Version 0 of input params */ 1756 struct ec_params_pwm_set_fan_target_rpm_v0 { 1757 uint32_t rpm; 1758 } __ec_align4; 1759 1760 /* Version 1 of input params */ 1761 struct ec_params_pwm_set_fan_target_rpm_v1 { 1762 uint32_t rpm; 1763 uint8_t fan_idx; 1764 } __ec_align_size1; 1765 1766 /* Get keyboard backlight */ 1767 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1768 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1769 1770 struct ec_response_pwm_get_keyboard_backlight { 1771 uint8_t percent; 1772 uint8_t enabled; 1773 } __ec_align1; 1774 1775 /* Set keyboard backlight */ 1776 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1777 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1778 1779 struct ec_params_pwm_set_keyboard_backlight { 1780 uint8_t percent; 1781 } __ec_align1; 1782 1783 /* Set target fan PWM duty cycle */ 1784 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1785 1786 /* Version 0 of input params */ 1787 struct ec_params_pwm_set_fan_duty_v0 { 1788 uint32_t percent; 1789 } __ec_align4; 1790 1791 /* Version 1 of input params */ 1792 struct ec_params_pwm_set_fan_duty_v1 { 1793 uint32_t percent; 1794 uint8_t fan_idx; 1795 } __ec_align_size1; 1796 1797 #define EC_CMD_PWM_SET_DUTY 0x0025 1798 /* 16 bit duty cycle, 0xffff = 100% */ 1799 #define EC_PWM_MAX_DUTY 0xffff 1800 1801 enum ec_pwm_type { 1802 /* All types, indexed by board-specific enum pwm_channel */ 1803 EC_PWM_TYPE_GENERIC = 0, 1804 /* Keyboard backlight */ 1805 EC_PWM_TYPE_KB_LIGHT, 1806 /* Display backlight */ 1807 EC_PWM_TYPE_DISPLAY_LIGHT, 1808 EC_PWM_TYPE_COUNT, 1809 }; 1810 1811 struct ec_params_pwm_set_duty { 1812 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1813 uint8_t pwm_type; /* ec_pwm_type */ 1814 uint8_t index; /* Type-specific index, or 0 if unique */ 1815 } __ec_align4; 1816 1817 #define EC_CMD_PWM_GET_DUTY 0x0026 1818 1819 struct ec_params_pwm_get_duty { 1820 uint8_t pwm_type; /* ec_pwm_type */ 1821 uint8_t index; /* Type-specific index, or 0 if unique */ 1822 } __ec_align1; 1823 1824 struct ec_response_pwm_get_duty { 1825 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1826 } __ec_align2; 1827 1828 #define EC_CMD_PWM_GET_FAN_DUTY 0x0027 1829 1830 struct ec_params_pwm_get_fan_duty { 1831 uint8_t fan_idx; 1832 } __ec_align1; 1833 1834 struct ec_response_pwm_get_fan_duty { 1835 uint32_t percent; /* Percentage of duty cycle, ranging from 0 ~ 100 */ 1836 } __ec_align4; 1837 1838 /*****************************************************************************/ 1839 /* 1840 * Lightbar commands. This looks worse than it is. Since we only use one HOST 1841 * command to say "talk to the lightbar", we put the "and tell it to do X" part 1842 * into a subcommand. We'll make separate structs for subcommands with 1843 * different input args, so that we know how much to expect. 1844 */ 1845 #define EC_CMD_LIGHTBAR_CMD 0x0028 1846 1847 struct rgb_s { 1848 uint8_t r, g, b; 1849 } __ec_todo_unpacked; 1850 1851 #define LB_BATTERY_LEVELS 4 1852 1853 /* 1854 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a 1855 * host command, but the alignment is the same regardless. Keep it that way. 1856 */ 1857 struct lightbar_params_v0 { 1858 /* Timing */ 1859 int32_t google_ramp_up; 1860 int32_t google_ramp_down; 1861 int32_t s3s0_ramp_up; 1862 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1863 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1864 int32_t s0s3_ramp_down; 1865 int32_t s3_sleep_for; 1866 int32_t s3_ramp_up; 1867 int32_t s3_ramp_down; 1868 1869 /* Oscillation */ 1870 uint8_t new_s0; 1871 uint8_t osc_min[2]; /* AC=0/1 */ 1872 uint8_t osc_max[2]; /* AC=0/1 */ 1873 uint8_t w_ofs[2]; /* AC=0/1 */ 1874 1875 /* Brightness limits based on the backlight and AC. */ 1876 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1877 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1878 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1879 1880 /* Battery level thresholds */ 1881 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1882 1883 /* Map [AC][battery_level] to color index */ 1884 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1885 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1886 1887 /* Color palette */ 1888 struct rgb_s color[8]; /* 0-3 are Google colors */ 1889 } __ec_todo_packed; 1890 1891 struct lightbar_params_v1 { 1892 /* Timing */ 1893 int32_t google_ramp_up; 1894 int32_t google_ramp_down; 1895 int32_t s3s0_ramp_up; 1896 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1897 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1898 int32_t s0s3_ramp_down; 1899 int32_t s3_sleep_for; 1900 int32_t s3_ramp_up; 1901 int32_t s3_ramp_down; 1902 int32_t s5_ramp_up; 1903 int32_t s5_ramp_down; 1904 int32_t tap_tick_delay; 1905 int32_t tap_gate_delay; 1906 int32_t tap_display_time; 1907 1908 /* Tap-for-battery params */ 1909 uint8_t tap_pct_red; 1910 uint8_t tap_pct_green; 1911 uint8_t tap_seg_min_on; 1912 uint8_t tap_seg_max_on; 1913 uint8_t tap_seg_osc; 1914 uint8_t tap_idx[3]; 1915 1916 /* Oscillation */ 1917 uint8_t osc_min[2]; /* AC=0/1 */ 1918 uint8_t osc_max[2]; /* AC=0/1 */ 1919 uint8_t w_ofs[2]; /* AC=0/1 */ 1920 1921 /* Brightness limits based on the backlight and AC. */ 1922 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1923 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1924 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1925 1926 /* Battery level thresholds */ 1927 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1928 1929 /* Map [AC][battery_level] to color index */ 1930 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1931 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1932 1933 /* s5: single color pulse on inhibited power-up */ 1934 uint8_t s5_idx; 1935 1936 /* Color palette */ 1937 struct rgb_s color[8]; /* 0-3 are Google colors */ 1938 } __ec_todo_packed; 1939 1940 /* Lightbar command params v2 1941 * crbug.com/467716 1942 * 1943 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1944 * logical groups to make it more manageable ( < 120 bytes). 1945 * 1946 * NOTE: Each of these groups must be less than 120 bytes. 1947 */ 1948 1949 struct lightbar_params_v2_timing { 1950 /* Timing */ 1951 int32_t google_ramp_up; 1952 int32_t google_ramp_down; 1953 int32_t s3s0_ramp_up; 1954 int32_t s0_tick_delay[2]; /* AC=0/1 */ 1955 int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1956 int32_t s0s3_ramp_down; 1957 int32_t s3_sleep_for; 1958 int32_t s3_ramp_up; 1959 int32_t s3_ramp_down; 1960 int32_t s5_ramp_up; 1961 int32_t s5_ramp_down; 1962 int32_t tap_tick_delay; 1963 int32_t tap_gate_delay; 1964 int32_t tap_display_time; 1965 } __ec_todo_packed; 1966 1967 struct lightbar_params_v2_tap { 1968 /* Tap-for-battery params */ 1969 uint8_t tap_pct_red; 1970 uint8_t tap_pct_green; 1971 uint8_t tap_seg_min_on; 1972 uint8_t tap_seg_max_on; 1973 uint8_t tap_seg_osc; 1974 uint8_t tap_idx[3]; 1975 } __ec_todo_packed; 1976 1977 struct lightbar_params_v2_oscillation { 1978 /* Oscillation */ 1979 uint8_t osc_min[2]; /* AC=0/1 */ 1980 uint8_t osc_max[2]; /* AC=0/1 */ 1981 uint8_t w_ofs[2]; /* AC=0/1 */ 1982 } __ec_todo_packed; 1983 1984 struct lightbar_params_v2_brightness { 1985 /* Brightness limits based on the backlight and AC. */ 1986 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1987 uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1988 uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1989 } __ec_todo_packed; 1990 1991 struct lightbar_params_v2_thresholds { 1992 /* Battery level thresholds */ 1993 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1994 } __ec_todo_packed; 1995 1996 struct lightbar_params_v2_colors { 1997 /* Map [AC][battery_level] to color index */ 1998 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1999 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 2000 2001 /* s5: single color pulse on inhibited power-up */ 2002 uint8_t s5_idx; 2003 2004 /* Color palette */ 2005 struct rgb_s color[8]; /* 0-3 are Google colors */ 2006 } __ec_todo_packed; 2007 2008 struct lightbar_params_v3 { 2009 /* 2010 * Number of LEDs reported by the EC. 2011 * May be less than the actual number of LEDs in the lightbar. 2012 */ 2013 uint8_t reported_led_num; 2014 } __ec_todo_packed; 2015 2016 /* Lightbar program. */ 2017 #define EC_LB_PROG_LEN 192 2018 struct lightbar_program { 2019 uint8_t size; 2020 uint8_t data[EC_LB_PROG_LEN]; 2021 } __ec_todo_unpacked; 2022 2023 /* 2024 * Lightbar program for large sequences. Sequences are sent in pieces, with 2025 * increasing offset. The sequences are still limited by the amount reserved in 2026 * EC RAM. 2027 */ 2028 struct lightbar_program_ex { 2029 uint8_t size; 2030 uint16_t offset; 2031 uint8_t data[]; 2032 } __ec_todo_packed; 2033 2034 struct ec_params_lightbar { 2035 uint8_t cmd; /* Command (see enum lightbar_command) */ 2036 union { 2037 /* 2038 * The following commands have no args: 2039 * 2040 * dump, off, on, init, get_seq, get_params_v0, get_params_v1, 2041 * version, get_brightness, get_demo, suspend, resume, 2042 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, 2043 * get_params_v2_bright, get_params_v2_thlds, 2044 * get_params_v2_colors 2045 * 2046 * Don't use an empty struct, because C++ hates that. 2047 */ 2048 2049 struct __ec_todo_unpacked { 2050 uint8_t num; 2051 } set_brightness, seq, demo; 2052 2053 struct __ec_todo_unpacked { 2054 uint8_t ctrl, reg, value; 2055 } reg; 2056 2057 struct __ec_todo_unpacked { 2058 uint8_t led, red, green, blue; 2059 } set_rgb; 2060 2061 struct __ec_todo_unpacked { 2062 uint8_t led; 2063 } get_rgb; 2064 2065 struct __ec_todo_unpacked { 2066 uint8_t enable; 2067 } manual_suspend_ctrl; 2068 2069 struct lightbar_params_v0 set_params_v0; 2070 struct lightbar_params_v1 set_params_v1; 2071 2072 struct lightbar_params_v2_timing set_v2par_timing; 2073 struct lightbar_params_v2_tap set_v2par_tap; 2074 struct lightbar_params_v2_oscillation set_v2par_osc; 2075 struct lightbar_params_v2_brightness set_v2par_bright; 2076 struct lightbar_params_v2_thresholds set_v2par_thlds; 2077 struct lightbar_params_v2_colors set_v2par_colors; 2078 2079 struct lightbar_program set_program; 2080 struct lightbar_program_ex set_program_ex; 2081 }; 2082 } __ec_todo_packed; 2083 2084 struct ec_response_lightbar { 2085 union { 2086 struct __ec_todo_unpacked { 2087 struct __ec_todo_unpacked { 2088 uint8_t reg; 2089 uint8_t ic0; 2090 uint8_t ic1; 2091 } vals[23]; 2092 } dump; 2093 2094 struct __ec_todo_unpacked { 2095 uint8_t num; 2096 } get_seq, get_brightness, get_demo; 2097 2098 struct lightbar_params_v0 get_params_v0; 2099 struct lightbar_params_v1 get_params_v1; 2100 2101 2102 struct lightbar_params_v2_timing get_params_v2_timing; 2103 struct lightbar_params_v2_tap get_params_v2_tap; 2104 struct lightbar_params_v2_oscillation get_params_v2_osc; 2105 struct lightbar_params_v2_brightness get_params_v2_bright; 2106 struct lightbar_params_v2_thresholds get_params_v2_thlds; 2107 struct lightbar_params_v2_colors get_params_v2_colors; 2108 2109 struct lightbar_params_v3 get_params_v3; 2110 2111 struct __ec_todo_unpacked { 2112 uint32_t num; 2113 uint32_t flags; 2114 } version; 2115 2116 struct __ec_todo_unpacked { 2117 uint8_t red, green, blue; 2118 } get_rgb; 2119 2120 /* 2121 * The following commands have no response: 2122 * 2123 * off, on, init, set_brightness, seq, reg, set_rgb, demo, 2124 * set_params_v0, set_params_v1, set_program, 2125 * manual_suspend_ctrl, suspend, resume, set_v2par_timing, 2126 * set_v2par_tap, set_v2par_osc, set_v2par_bright, 2127 * set_v2par_thlds, set_v2par_colors 2128 */ 2129 }; 2130 } __ec_todo_packed; 2131 2132 /* Lightbar commands */ 2133 enum lightbar_command { 2134 LIGHTBAR_CMD_DUMP = 0, 2135 LIGHTBAR_CMD_OFF = 1, 2136 LIGHTBAR_CMD_ON = 2, 2137 LIGHTBAR_CMD_INIT = 3, 2138 LIGHTBAR_CMD_SET_BRIGHTNESS = 4, 2139 LIGHTBAR_CMD_SEQ = 5, 2140 LIGHTBAR_CMD_REG = 6, 2141 LIGHTBAR_CMD_SET_RGB = 7, 2142 LIGHTBAR_CMD_GET_SEQ = 8, 2143 LIGHTBAR_CMD_DEMO = 9, 2144 LIGHTBAR_CMD_GET_PARAMS_V0 = 10, 2145 LIGHTBAR_CMD_SET_PARAMS_V0 = 11, 2146 LIGHTBAR_CMD_VERSION = 12, 2147 LIGHTBAR_CMD_GET_BRIGHTNESS = 13, 2148 LIGHTBAR_CMD_GET_RGB = 14, 2149 LIGHTBAR_CMD_GET_DEMO = 15, 2150 LIGHTBAR_CMD_GET_PARAMS_V1 = 16, 2151 LIGHTBAR_CMD_SET_PARAMS_V1 = 17, 2152 LIGHTBAR_CMD_SET_PROGRAM = 18, 2153 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 2154 LIGHTBAR_CMD_SUSPEND = 20, 2155 LIGHTBAR_CMD_RESUME = 21, 2156 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 2157 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 2158 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 2159 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 2160 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 2161 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 2162 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 2163 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 2164 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 2165 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 2166 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 2167 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 2168 LIGHTBAR_CMD_GET_PARAMS_V3 = 34, 2169 LIGHTBAR_CMD_SET_PROGRAM_EX = 35, 2170 LIGHTBAR_NUM_CMDS 2171 }; 2172 2173 /*****************************************************************************/ 2174 /* LED control commands */ 2175 2176 #define EC_CMD_LED_CONTROL 0x0029 2177 2178 enum ec_led_id { 2179 /* LED to indicate battery state of charge */ 2180 EC_LED_ID_BATTERY_LED = 0, 2181 /* 2182 * LED to indicate system power state (on or in suspend). 2183 * May be on power button or on C-panel. 2184 */ 2185 EC_LED_ID_POWER_LED, 2186 /* LED on power adapter or its plug */ 2187 EC_LED_ID_ADAPTER_LED, 2188 /* LED to indicate left side */ 2189 EC_LED_ID_LEFT_LED, 2190 /* LED to indicate right side */ 2191 EC_LED_ID_RIGHT_LED, 2192 /* LED to indicate recovery mode with HW_REINIT */ 2193 EC_LED_ID_RECOVERY_HW_REINIT_LED, 2194 /* LED to indicate sysrq debug mode. */ 2195 EC_LED_ID_SYSRQ_DEBUG_LED, 2196 2197 EC_LED_ID_COUNT 2198 }; 2199 2200 /* LED control flags */ 2201 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ 2202 #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ 2203 2204 enum ec_led_colors { 2205 EC_LED_COLOR_RED = 0, 2206 EC_LED_COLOR_GREEN, 2207 EC_LED_COLOR_BLUE, 2208 EC_LED_COLOR_YELLOW, 2209 EC_LED_COLOR_WHITE, 2210 EC_LED_COLOR_AMBER, 2211 2212 EC_LED_COLOR_COUNT 2213 }; 2214 2215 struct ec_params_led_control { 2216 uint8_t led_id; /* Which LED to control */ 2217 uint8_t flags; /* Control flags */ 2218 2219 uint8_t brightness[EC_LED_COLOR_COUNT]; 2220 } __ec_align1; 2221 2222 struct ec_response_led_control { 2223 /* 2224 * Available brightness value range. 2225 * 2226 * Range 0 means color channel not present. 2227 * Range 1 means on/off control. 2228 * Other values means the LED is control by PWM. 2229 */ 2230 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 2231 } __ec_align1; 2232 2233 /*****************************************************************************/ 2234 /* Verified boot commands */ 2235 2236 /* 2237 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be 2238 * reused for other purposes with version > 0. 2239 */ 2240 2241 /* Verified boot hash command */ 2242 #define EC_CMD_VBOOT_HASH 0x002A 2243 2244 struct ec_params_vboot_hash { 2245 uint8_t cmd; /* enum ec_vboot_hash_cmd */ 2246 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2247 uint8_t nonce_size; /* Nonce size; may be 0 */ 2248 uint8_t reserved0; /* Reserved; set 0 */ 2249 uint32_t offset; /* Offset in flash to hash */ 2250 uint32_t size; /* Number of bytes to hash */ 2251 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 2252 } __ec_align4; 2253 2254 struct ec_response_vboot_hash { 2255 uint8_t status; /* enum ec_vboot_hash_status */ 2256 uint8_t hash_type; /* enum ec_vboot_hash_type */ 2257 uint8_t digest_size; /* Size of hash digest in bytes */ 2258 uint8_t reserved0; /* Ignore; will be 0 */ 2259 uint32_t offset; /* Offset in flash which was hashed */ 2260 uint32_t size; /* Number of bytes hashed */ 2261 uint8_t hash_digest[64]; /* Hash digest data */ 2262 } __ec_align4; 2263 2264 enum ec_vboot_hash_cmd { 2265 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ 2266 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */ 2267 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */ 2268 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */ 2269 }; 2270 2271 enum ec_vboot_hash_type { 2272 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */ 2273 }; 2274 2275 enum ec_vboot_hash_status { 2276 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */ 2277 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */ 2278 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */ 2279 }; 2280 2281 /* 2282 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC. 2283 * If one of these is specified, the EC will automatically update offset and 2284 * size to the correct values for the specified image (RO or RW). 2285 */ 2286 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 2287 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 2288 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 2289 2290 /* 2291 * 'RW' is vague if there are multiple RW images; we mean the active one, 2292 * so the old constant is deprecated. 2293 */ 2294 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE 2295 2296 /*****************************************************************************/ 2297 /* 2298 * Motion sense commands. We'll make separate structs for sub-commands with 2299 * different input args, so that we know how much to expect. 2300 */ 2301 #define EC_CMD_MOTION_SENSE_CMD 0x002B 2302 2303 /* Motion sense commands */ 2304 enum motionsense_command { 2305 /* 2306 * Dump command returns all motion sensor data including motion sense 2307 * module flags and individual sensor flags. 2308 */ 2309 MOTIONSENSE_CMD_DUMP = 0, 2310 2311 /* 2312 * Info command returns data describing the details of a given sensor, 2313 * including enum motionsensor_type, enum motionsensor_location, and 2314 * enum motionsensor_chip. 2315 */ 2316 MOTIONSENSE_CMD_INFO = 1, 2317 2318 /* 2319 * EC Rate command is a setter/getter command for the EC sampling rate 2320 * in milliseconds. 2321 * It is per sensor, the EC run sample task at the minimum of all 2322 * sensors EC_RATE. 2323 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 2324 * to collect all the sensor samples. 2325 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 2326 * to process of all motion sensors in milliseconds. 2327 */ 2328 MOTIONSENSE_CMD_EC_RATE = 2, 2329 2330 /* 2331 * Sensor ODR command is a setter/getter command for the output data 2332 * rate of a specific motion sensor in millihertz. 2333 */ 2334 MOTIONSENSE_CMD_SENSOR_ODR = 3, 2335 2336 /* 2337 * Sensor range command is a setter/getter command for the range of 2338 * a specified motion sensor in +/-G's or +/- deg/s. 2339 */ 2340 MOTIONSENSE_CMD_SENSOR_RANGE = 4, 2341 2342 /* 2343 * Setter/getter command for the keyboard wake angle. When the lid 2344 * angle is greater than this value, keyboard wake is disabled in S3, 2345 * and when the lid angle goes less than this value, keyboard wake is 2346 * enabled. Note, the lid angle measurement is an approximate, 2347 * un-calibrated value, hence the wake angle isn't exact. 2348 */ 2349 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5, 2350 2351 /* 2352 * Returns a single sensor data. 2353 */ 2354 MOTIONSENSE_CMD_DATA = 6, 2355 2356 /* 2357 * Return sensor fifo info. 2358 */ 2359 MOTIONSENSE_CMD_FIFO_INFO = 7, 2360 2361 /* 2362 * Insert a flush element in the fifo and return sensor fifo info. 2363 * The host can use that element to synchronize its operation. 2364 */ 2365 MOTIONSENSE_CMD_FIFO_FLUSH = 8, 2366 2367 /* 2368 * Return a portion of the fifo. 2369 */ 2370 MOTIONSENSE_CMD_FIFO_READ = 9, 2371 2372 /* 2373 * Perform low level calibration. 2374 * On sensors that support it, ask to do offset calibration. 2375 */ 2376 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2377 2378 /* 2379 * Sensor Offset command is a setter/getter command for the offset 2380 * used for calibration. 2381 * The offsets can be calculated by the host, or via 2382 * PERFORM_CALIB command. 2383 */ 2384 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2385 2386 /* 2387 * List available activities for a MOTION sensor. 2388 * Indicates if they are enabled or disabled. 2389 */ 2390 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2391 2392 /* 2393 * Activity management 2394 * Enable/Disable activity recognition. 2395 */ 2396 MOTIONSENSE_CMD_SET_ACTIVITY = 13, 2397 2398 /* 2399 * Lid Angle 2400 */ 2401 MOTIONSENSE_CMD_LID_ANGLE = 14, 2402 2403 /* 2404 * Allow the FIFO to trigger interrupt via MKBP events. 2405 * By default the FIFO does not send interrupt to process the FIFO 2406 * until the AP is ready or it is coming from a wakeup sensor. 2407 */ 2408 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 2409 2410 /* 2411 * Spoof the readings of the sensors. The spoofed readings can be set 2412 * to arbitrary values, or will lock to the last read actual values. 2413 */ 2414 MOTIONSENSE_CMD_SPOOF = 16, 2415 2416 /* Set lid angle for tablet mode detection. */ 2417 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, 2418 2419 /* 2420 * Sensor Scale command is a setter/getter command for the calibration 2421 * scale. 2422 */ 2423 MOTIONSENSE_CMD_SENSOR_SCALE = 18, 2424 2425 /* 2426 * Activity management 2427 * Retrieve current status of given activity. 2428 */ 2429 MOTIONSENSE_CMD_GET_ACTIVITY = 20, 2430 2431 /* Number of motionsense sub-commands. */ 2432 MOTIONSENSE_NUM_CMDS 2433 }; 2434 2435 /* List of motion sensor types. */ 2436 enum motionsensor_type { 2437 MOTIONSENSE_TYPE_ACCEL = 0, 2438 MOTIONSENSE_TYPE_GYRO = 1, 2439 MOTIONSENSE_TYPE_MAG = 2, 2440 MOTIONSENSE_TYPE_PROX = 3, 2441 MOTIONSENSE_TYPE_LIGHT = 4, 2442 MOTIONSENSE_TYPE_ACTIVITY = 5, 2443 MOTIONSENSE_TYPE_BARO = 6, 2444 MOTIONSENSE_TYPE_SYNC = 7, 2445 MOTIONSENSE_TYPE_MAX, 2446 }; 2447 2448 /* List of motion sensor locations. */ 2449 enum motionsensor_location { 2450 MOTIONSENSE_LOC_BASE = 0, 2451 MOTIONSENSE_LOC_LID = 1, 2452 MOTIONSENSE_LOC_CAMERA = 2, 2453 MOTIONSENSE_LOC_MAX, 2454 }; 2455 2456 /* List of motion sensor chips. */ 2457 enum motionsensor_chip { 2458 MOTIONSENSE_CHIP_KXCJ9 = 0, 2459 MOTIONSENSE_CHIP_LSM6DS0 = 1, 2460 MOTIONSENSE_CHIP_BMI160 = 2, 2461 MOTIONSENSE_CHIP_SI1141 = 3, 2462 MOTIONSENSE_CHIP_SI1142 = 4, 2463 MOTIONSENSE_CHIP_SI1143 = 5, 2464 MOTIONSENSE_CHIP_KX022 = 6, 2465 MOTIONSENSE_CHIP_L3GD20H = 7, 2466 MOTIONSENSE_CHIP_BMA255 = 8, 2467 MOTIONSENSE_CHIP_BMP280 = 9, 2468 MOTIONSENSE_CHIP_OPT3001 = 10, 2469 MOTIONSENSE_CHIP_BH1730 = 11, 2470 MOTIONSENSE_CHIP_GPIO = 12, 2471 MOTIONSENSE_CHIP_LIS2DH = 13, 2472 MOTIONSENSE_CHIP_LSM6DSM = 14, 2473 MOTIONSENSE_CHIP_LIS2DE = 15, 2474 MOTIONSENSE_CHIP_LIS2MDL = 16, 2475 MOTIONSENSE_CHIP_LSM6DS3 = 17, 2476 MOTIONSENSE_CHIP_LSM6DSO = 18, 2477 MOTIONSENSE_CHIP_LNG2DM = 19, 2478 MOTIONSENSE_CHIP_MAX, 2479 }; 2480 2481 /* List of orientation positions */ 2482 enum motionsensor_orientation { 2483 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, 2484 MOTIONSENSE_ORIENTATION_PORTRAIT = 1, 2485 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, 2486 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, 2487 MOTIONSENSE_ORIENTATION_UNKNOWN = 4, 2488 }; 2489 2490 struct ec_response_activity_data { 2491 uint8_t activity; /* motionsensor_activity */ 2492 uint8_t state; 2493 } __ec_todo_packed; 2494 2495 struct ec_response_motion_sensor_data { 2496 /* Flags for each sensor. */ 2497 uint8_t flags; 2498 /* Sensor number the data comes from. */ 2499 uint8_t sensor_num; 2500 /* Each sensor is up to 3-axis. */ 2501 union { 2502 int16_t data[3]; 2503 struct __ec_todo_packed { 2504 uint16_t reserved; 2505 uint32_t timestamp; 2506 }; 2507 struct __ec_todo_unpacked { 2508 struct ec_response_activity_data activity_data; 2509 int16_t add_info[2]; 2510 }; 2511 }; 2512 } __ec_todo_packed; 2513 2514 /* Note: used in ec_response_get_next_data */ 2515 struct ec_response_motion_sense_fifo_info { 2516 /* Size of the fifo */ 2517 uint16_t size; 2518 /* Amount of space used in the fifo */ 2519 uint16_t count; 2520 /* Timestamp recorded in us. 2521 * aka accurate timestamp when host event was triggered. 2522 */ 2523 uint32_t timestamp; 2524 /* Total amount of vector lost */ 2525 uint16_t total_lost; 2526 /* Lost events since the last fifo_info, per sensors */ 2527 uint16_t lost[]; 2528 } __ec_todo_packed; 2529 2530 struct ec_response_motion_sense_fifo_data { 2531 uint32_t number_data; 2532 struct ec_response_motion_sensor_data data[]; 2533 } __ec_todo_packed; 2534 2535 /* List supported activity recognition */ 2536 enum motionsensor_activity { 2537 MOTIONSENSE_ACTIVITY_RESERVED = 0, 2538 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 2539 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 2540 MOTIONSENSE_ACTIVITY_ORIENTATION = 3, 2541 MOTIONSENSE_ACTIVITY_BODY_DETECTION = 4, 2542 }; 2543 2544 struct ec_motion_sense_activity { 2545 uint8_t sensor_num; 2546 uint8_t activity; /* one of enum motionsensor_activity */ 2547 uint8_t enable; /* 1: enable, 0: disable */ 2548 uint8_t reserved; 2549 uint16_t parameters[3]; /* activity dependent parameters */ 2550 } __ec_todo_unpacked; 2551 2552 /* Module flag masks used for the dump sub-command. */ 2553 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) 2554 2555 /* Sensor flag masks used for the dump sub-command. */ 2556 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) 2557 2558 /* 2559 * Flush entry for synchronization. 2560 * data contains time stamp 2561 */ 2562 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) 2563 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) 2564 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) 2565 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) 2566 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) 2567 2568 /* 2569 * Send this value for the data element to only perform a read. If you 2570 * send any other value, the EC will interpret it as data to set and will 2571 * return the actual value set. 2572 */ 2573 #define EC_MOTION_SENSE_NO_VALUE -1 2574 2575 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2576 2577 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2578 /* Set Calibration information */ 2579 #define MOTION_SENSE_SET_OFFSET BIT(0) 2580 2581 /* Default Scale value, factor 1. */ 2582 #define MOTION_SENSE_DEFAULT_SCALE BIT(15) 2583 2584 #define LID_ANGLE_UNRELIABLE 500 2585 2586 enum motionsense_spoof_mode { 2587 /* Disable spoof mode. */ 2588 MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 2589 2590 /* Enable spoof mode, but use provided component values. */ 2591 MOTIONSENSE_SPOOF_MODE_CUSTOM, 2592 2593 /* Enable spoof mode, but use the current sensor values. */ 2594 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 2595 2596 /* Query the current spoof mode status for the sensor. */ 2597 MOTIONSENSE_SPOOF_MODE_QUERY, 2598 }; 2599 2600 struct ec_params_motion_sense { 2601 uint8_t cmd; 2602 union { 2603 /* Used for MOTIONSENSE_CMD_DUMP. */ 2604 struct __ec_todo_unpacked { 2605 /* 2606 * Maximal number of sensor the host is expecting. 2607 * 0 means the host is only interested in the number 2608 * of sensors controlled by the EC. 2609 */ 2610 uint8_t max_sensor_count; 2611 } dump; 2612 2613 /* 2614 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2615 */ 2616 struct __ec_todo_unpacked { 2617 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 2618 * kb_wake_angle: angle to wakup AP. 2619 */ 2620 int16_t data; 2621 } kb_wake_angle; 2622 2623 /* 2624 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 2625 */ 2626 struct __ec_todo_unpacked { 2627 uint8_t sensor_num; 2628 } info, info_3, data, fifo_flush, list_activities; 2629 2630 /* 2631 * Used for MOTIONSENSE_CMD_PERFORM_CALIB: 2632 * Allow entering/exiting the calibration mode. 2633 */ 2634 struct __ec_todo_unpacked { 2635 uint8_t sensor_num; 2636 uint8_t enable; 2637 } perform_calib; 2638 /* 2639 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 2640 * and MOTIONSENSE_CMD_SENSOR_RANGE. 2641 */ 2642 struct __ec_todo_unpacked { 2643 uint8_t sensor_num; 2644 2645 /* Rounding flag, true for round-up, false for down. */ 2646 uint8_t roundup; 2647 2648 uint16_t reserved; 2649 2650 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2651 int32_t data; 2652 } ec_rate, sensor_odr, sensor_range; 2653 2654 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2655 struct __ec_todo_packed { 2656 uint8_t sensor_num; 2657 2658 /* 2659 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2660 * the calibration information in the EC. 2661 * If unset, just retrieve calibration information. 2662 */ 2663 uint16_t flags; 2664 2665 /* 2666 * Temperature at calibration, in units of 0.01 C 2667 * 0x8000: invalid / unknown. 2668 * 0x0: 0C 2669 * 0x7fff: +327.67C 2670 */ 2671 int16_t temp; 2672 2673 /* 2674 * Offset for calibration. 2675 * Unit: 2676 * Accelerometer: 1/1024 g 2677 * Gyro: 1/1024 deg/s 2678 * Compass: 1/16 uT 2679 */ 2680 int16_t offset[3]; 2681 } sensor_offset; 2682 2683 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2684 struct __ec_todo_packed { 2685 uint8_t sensor_num; 2686 2687 /* 2688 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 2689 * the calibration information in the EC. 2690 * If unset, just retrieve calibration information. 2691 */ 2692 uint16_t flags; 2693 2694 /* 2695 * Temperature at calibration, in units of 0.01 C 2696 * 0x8000: invalid / unknown. 2697 * 0x0: 0C 2698 * 0x7fff: +327.67C 2699 */ 2700 int16_t temp; 2701 2702 /* 2703 * Scale for calibration: 2704 * By default scale is 1, it is encoded on 16bits: 2705 * 1 = BIT(15) 2706 * ~2 = 0xFFFF 2707 * ~0 = 0. 2708 */ 2709 uint16_t scale[3]; 2710 } sensor_scale; 2711 2712 2713 /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 2714 /* (no params) */ 2715 2716 /* Used for MOTIONSENSE_CMD_FIFO_READ */ 2717 struct __ec_todo_unpacked { 2718 /* 2719 * Number of expected vector to return. 2720 * EC may return less or 0 if none available. 2721 */ 2722 uint32_t max_data_vector; 2723 } fifo_read; 2724 2725 /* Used for MOTIONSENSE_CMD_SET_ACTIVITY */ 2726 struct ec_motion_sense_activity set_activity; 2727 2728 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2729 /* (no params) */ 2730 2731 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 2732 struct __ec_todo_unpacked { 2733 /* 2734 * 1: enable, 0 disable fifo, 2735 * EC_MOTION_SENSE_NO_VALUE return value. 2736 */ 2737 int8_t enable; 2738 } fifo_int_enable; 2739 2740 /* Used for MOTIONSENSE_CMD_SPOOF */ 2741 struct __ec_todo_packed { 2742 uint8_t sensor_id; 2743 2744 /* See enum motionsense_spoof_mode. */ 2745 uint8_t spoof_enable; 2746 2747 /* Ignored, used for alignment. */ 2748 uint8_t reserved; 2749 2750 /* Individual component values to spoof. */ 2751 int16_t components[3]; 2752 } spoof; 2753 2754 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2755 struct __ec_todo_unpacked { 2756 /* 2757 * Lid angle threshold for switching between tablet and 2758 * clamshell mode. 2759 */ 2760 int16_t lid_angle; 2761 2762 /* 2763 * Hysteresis degree to prevent fluctuations between 2764 * clamshell and tablet mode if lid angle keeps 2765 * changing around the threshold. Lid motion driver will 2766 * use lid_angle + hys_degree to trigger tablet mode and 2767 * lid_angle - hys_degree to trigger clamshell mode. 2768 */ 2769 int16_t hys_degree; 2770 } tablet_mode_threshold; 2771 2772 /* Used for MOTIONSENSE_CMD_GET_ACTIVITY */ 2773 struct __ec_todo_unpacked { 2774 uint8_t sensor_num; 2775 uint8_t activity; /* enum motionsensor_activity */ 2776 } get_activity; 2777 }; 2778 } __ec_todo_packed; 2779 2780 struct ec_response_motion_sense { 2781 union { 2782 /* Used for MOTIONSENSE_CMD_DUMP */ 2783 struct __ec_todo_unpacked { 2784 /* Flags representing the motion sensor module. */ 2785 uint8_t module_flags; 2786 2787 /* Number of sensors managed directly by the EC. */ 2788 uint8_t sensor_count; 2789 2790 /* 2791 * Sensor data is truncated if response_max is too small 2792 * for holding all the data. 2793 */ 2794 DECLARE_FLEX_ARRAY(struct ec_response_motion_sensor_data, sensor); 2795 } dump; 2796 2797 /* Used for MOTIONSENSE_CMD_INFO. */ 2798 struct __ec_todo_unpacked { 2799 /* Should be element of enum motionsensor_type. */ 2800 uint8_t type; 2801 2802 /* Should be element of enum motionsensor_location. */ 2803 uint8_t location; 2804 2805 /* Should be element of enum motionsensor_chip. */ 2806 uint8_t chip; 2807 } info; 2808 2809 /* Used for MOTIONSENSE_CMD_INFO version 3 */ 2810 struct __ec_todo_unpacked { 2811 /* Should be element of enum motionsensor_type. */ 2812 uint8_t type; 2813 2814 /* Should be element of enum motionsensor_location. */ 2815 uint8_t location; 2816 2817 /* Should be element of enum motionsensor_chip. */ 2818 uint8_t chip; 2819 2820 /* Minimum sensor sampling frequency */ 2821 uint32_t min_frequency; 2822 2823 /* Maximum sensor sampling frequency */ 2824 uint32_t max_frequency; 2825 2826 /* Max number of sensor events that could be in fifo */ 2827 uint32_t fifo_max_event_count; 2828 } info_3; 2829 2830 /* Used for MOTIONSENSE_CMD_DATA */ 2831 struct ec_response_motion_sensor_data data; 2832 2833 /* 2834 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2835 * MOTIONSENSE_CMD_SENSOR_RANGE, 2836 * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 2837 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 2838 * MOTIONSENSE_CMD_SPOOF. 2839 */ 2840 struct __ec_todo_unpacked { 2841 /* Current value of the parameter queried. */ 2842 int32_t ret; 2843 } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 2844 fifo_int_enable, spoof; 2845 2846 /* 2847 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, 2848 * PERFORM_CALIB. 2849 */ 2850 struct __ec_todo_unpacked { 2851 int16_t temp; 2852 int16_t offset[3]; 2853 } sensor_offset, perform_calib; 2854 2855 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 2856 struct __ec_todo_unpacked { 2857 int16_t temp; 2858 uint16_t scale[3]; 2859 } sensor_scale; 2860 2861 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 2862 2863 struct ec_response_motion_sense_fifo_data fifo_read; 2864 2865 struct __ec_todo_packed { 2866 uint16_t reserved; 2867 uint32_t enabled; 2868 uint32_t disabled; 2869 } list_activities; 2870 2871 /* No params for set activity */ 2872 2873 /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 2874 struct __ec_todo_unpacked { 2875 /* 2876 * Angle between 0 and 360 degree if available, 2877 * LID_ANGLE_UNRELIABLE otherwise. 2878 */ 2879 uint16_t value; 2880 } lid_angle; 2881 2882 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 2883 struct __ec_todo_unpacked { 2884 /* 2885 * Lid angle threshold for switching between tablet and 2886 * clamshell mode. 2887 */ 2888 uint16_t lid_angle; 2889 2890 /* Hysteresis degree. */ 2891 uint16_t hys_degree; 2892 } tablet_mode_threshold; 2893 2894 /* USED for MOTIONSENSE_CMD_GET_ACTIVITY. */ 2895 struct __ec_todo_unpacked { 2896 uint8_t state; 2897 } get_activity; 2898 }; 2899 } __ec_todo_packed; 2900 2901 /*****************************************************************************/ 2902 /* Force lid open command */ 2903 2904 /* Make lid event always open */ 2905 #define EC_CMD_FORCE_LID_OPEN 0x002C 2906 2907 struct ec_params_force_lid_open { 2908 uint8_t enabled; 2909 } __ec_align1; 2910 2911 /*****************************************************************************/ 2912 /* Configure the behavior of the power button */ 2913 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D 2914 2915 enum ec_config_power_button_flags { 2916 /* Enable/Disable power button pulses for x86 devices */ 2917 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), 2918 }; 2919 2920 struct ec_params_config_power_button { 2921 /* See enum ec_config_power_button_flags */ 2922 uint8_t flags; 2923 } __ec_align1; 2924 2925 /*****************************************************************************/ 2926 /* USB charging control commands */ 2927 2928 /* Set USB port charging mode */ 2929 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2930 2931 struct ec_params_usb_charge_set_mode { 2932 uint8_t usb_port_id; 2933 uint8_t mode:7; 2934 uint8_t inhibit_charge:1; 2935 } __ec_align1; 2936 2937 /*****************************************************************************/ 2938 /* Persistent storage for host */ 2939 2940 /* Maximum bytes that can be read/written in a single command */ 2941 #define EC_PSTORE_SIZE_MAX 64 2942 2943 /* Get persistent storage info */ 2944 #define EC_CMD_PSTORE_INFO 0x0040 2945 2946 struct ec_response_pstore_info { 2947 /* Persistent storage size, in bytes */ 2948 uint32_t pstore_size; 2949 /* Access size; read/write offset and size must be a multiple of this */ 2950 uint32_t access_size; 2951 } __ec_align4; 2952 2953 /* 2954 * Read persistent storage 2955 * 2956 * Response is params.size bytes of data. 2957 */ 2958 #define EC_CMD_PSTORE_READ 0x0041 2959 2960 struct ec_params_pstore_read { 2961 uint32_t offset; /* Byte offset to read */ 2962 uint32_t size; /* Size to read in bytes */ 2963 } __ec_align4; 2964 2965 /* Write persistent storage */ 2966 #define EC_CMD_PSTORE_WRITE 0x0042 2967 2968 struct ec_params_pstore_write { 2969 uint32_t offset; /* Byte offset to write */ 2970 uint32_t size; /* Size to write in bytes */ 2971 uint8_t data[EC_PSTORE_SIZE_MAX]; 2972 } __ec_align4; 2973 2974 /*****************************************************************************/ 2975 /* Real-time clock */ 2976 2977 /* RTC params and response structures */ 2978 struct ec_params_rtc { 2979 uint32_t time; 2980 } __ec_align4; 2981 2982 struct ec_response_rtc { 2983 uint32_t time; 2984 } __ec_align4; 2985 2986 /* These use ec_response_rtc */ 2987 #define EC_CMD_RTC_GET_VALUE 0x0044 2988 #define EC_CMD_RTC_GET_ALARM 0x0045 2989 2990 /* These all use ec_params_rtc */ 2991 #define EC_CMD_RTC_SET_VALUE 0x0046 2992 #define EC_CMD_RTC_SET_ALARM 0x0047 2993 2994 /* Pass as time param to SET_ALARM to clear the current alarm */ 2995 #define EC_RTC_ALARM_CLEAR 0 2996 2997 /*****************************************************************************/ 2998 /* Port80 log access */ 2999 3000 /* Maximum entries that can be read/written in a single command */ 3001 #define EC_PORT80_SIZE_MAX 32 3002 3003 /* Get last port80 code from previous boot */ 3004 #define EC_CMD_PORT80_LAST_BOOT 0x0048 3005 #define EC_CMD_PORT80_READ 0x0048 3006 3007 enum ec_port80_subcmd { 3008 EC_PORT80_GET_INFO = 0, 3009 EC_PORT80_READ_BUFFER, 3010 }; 3011 3012 struct ec_params_port80_read { 3013 uint16_t subcmd; 3014 union { 3015 struct __ec_todo_unpacked { 3016 uint32_t offset; 3017 uint32_t num_entries; 3018 } read_buffer; 3019 }; 3020 } __ec_todo_packed; 3021 3022 struct ec_response_port80_read { 3023 union { 3024 struct __ec_todo_unpacked { 3025 uint32_t writes; 3026 uint32_t history_size; 3027 uint32_t last_boot; 3028 } get_info; 3029 struct __ec_todo_unpacked { 3030 uint16_t codes[EC_PORT80_SIZE_MAX]; 3031 } data; 3032 }; 3033 } __ec_todo_packed; 3034 3035 struct ec_response_port80_last_boot { 3036 uint16_t code; 3037 } __ec_align2; 3038 3039 /*****************************************************************************/ 3040 /* Temporary secure storage for host verified boot use */ 3041 3042 /* Number of bytes in a vstore slot */ 3043 #define EC_VSTORE_SLOT_SIZE 64 3044 3045 /* Maximum number of vstore slots */ 3046 #define EC_VSTORE_SLOT_MAX 32 3047 3048 /* Get persistent storage info */ 3049 #define EC_CMD_VSTORE_INFO 0x0049 3050 struct ec_response_vstore_info { 3051 /* Indicates which slots are locked */ 3052 uint32_t slot_locked; 3053 /* Total number of slots available */ 3054 uint8_t slot_count; 3055 } __ec_align_size1; 3056 3057 /* 3058 * Read temporary secure storage 3059 * 3060 * Response is EC_VSTORE_SLOT_SIZE bytes of data. 3061 */ 3062 #define EC_CMD_VSTORE_READ 0x004A 3063 3064 struct ec_params_vstore_read { 3065 uint8_t slot; /* Slot to read from */ 3066 } __ec_align1; 3067 3068 struct ec_response_vstore_read { 3069 uint8_t data[EC_VSTORE_SLOT_SIZE]; 3070 } __ec_align1; 3071 3072 /* 3073 * Write temporary secure storage and lock it. 3074 */ 3075 #define EC_CMD_VSTORE_WRITE 0x004B 3076 3077 struct ec_params_vstore_write { 3078 uint8_t slot; /* Slot to write to */ 3079 uint8_t data[EC_VSTORE_SLOT_SIZE]; 3080 } __ec_align1; 3081 3082 /*****************************************************************************/ 3083 /* Thermal engine commands. Note that there are two implementations. We'll 3084 * reuse the command number, but the data and behavior is incompatible. 3085 * Version 0 is what originally shipped on Link. 3086 * Version 1 separates the CPU thermal limits from the fan control. 3087 */ 3088 3089 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 3090 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 3091 3092 /* The version 0 structs are opaque. You have to know what they are for 3093 * the get/set commands to make any sense. 3094 */ 3095 3096 /* Version 0 - set */ 3097 struct ec_params_thermal_set_threshold { 3098 uint8_t sensor_type; 3099 uint8_t threshold_id; 3100 uint16_t value; 3101 } __ec_align2; 3102 3103 /* Version 0 - get */ 3104 struct ec_params_thermal_get_threshold { 3105 uint8_t sensor_type; 3106 uint8_t threshold_id; 3107 } __ec_align1; 3108 3109 struct ec_response_thermal_get_threshold { 3110 uint16_t value; 3111 } __ec_align2; 3112 3113 3114 /* The version 1 structs are visible. */ 3115 enum ec_temp_thresholds { 3116 EC_TEMP_THRESH_WARN = 0, 3117 EC_TEMP_THRESH_HIGH, 3118 EC_TEMP_THRESH_HALT, 3119 3120 EC_TEMP_THRESH_COUNT 3121 }; 3122 3123 /* 3124 * Thermal configuration for one temperature sensor. Temps are in degrees K. 3125 * Zero values will be silently ignored by the thermal task. 3126 * 3127 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree 3128 * hysteresis. 3129 * For example, 3130 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3131 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K 3132 * EC will throttle ap when temperature >= 301 K, and release throttling when 3133 * temperature <= 299 K. 3134 * 3135 * Set 'temp_host_release' value allows thermal task has a custom hysteresis. 3136 * For example, 3137 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 3138 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K 3139 * EC will throttle ap when temperature >= 301 K, and release throttling when 3140 * temperature <= 294 K. 3141 * 3142 * Note that this structure is a sub-structure of 3143 * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 3144 */ 3145 struct ec_thermal_config { 3146 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 3147 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ 3148 uint32_t temp_fan_off; /* no active cooling needed */ 3149 uint32_t temp_fan_max; /* max active cooling needed */ 3150 } __ec_align4; 3151 3152 /* Version 1 - get config for one sensor. */ 3153 struct ec_params_thermal_get_threshold_v1 { 3154 uint32_t sensor_num; 3155 } __ec_align4; 3156 /* This returns a struct ec_thermal_config */ 3157 3158 /* 3159 * Version 1 - set config for one sensor. 3160 * Use read-modify-write for best results! 3161 */ 3162 struct ec_params_thermal_set_threshold_v1 { 3163 uint32_t sensor_num; 3164 struct ec_thermal_config cfg; 3165 } __ec_align4; 3166 /* This returns no data */ 3167 3168 /****************************************************************************/ 3169 3170 /* Set or get fan control mode */ 3171 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 3172 3173 enum ec_auto_fan_ctrl_cmd { 3174 EC_AUTO_FAN_CONTROL_CMD_SET = 0, 3175 EC_AUTO_FAN_CONTROL_CMD_GET, 3176 }; 3177 3178 /* Version 1 of input params */ 3179 struct ec_params_auto_fan_ctrl_v1 { 3180 uint8_t fan_idx; 3181 } __ec_align1; 3182 3183 /* Version 2 of input params */ 3184 struct ec_params_auto_fan_ctrl_v2 { 3185 uint8_t fan_idx; 3186 uint8_t cmd; /* enum ec_auto_fan_ctrl_cmd */ 3187 uint8_t set_auto; /* only used with EC_AUTO_FAN_CONTROL_CMD_SET - bool 3188 */ 3189 } __ec_align4; 3190 3191 struct ec_response_auto_fan_control { 3192 uint8_t is_auto; /* bool */ 3193 } __ec_align1; 3194 3195 /* Get/Set TMP006 calibration data */ 3196 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 3197 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 3198 3199 /* 3200 * The original TMP006 calibration only needed four params, but now we need 3201 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 3202 * the params opaque. The v1 "get" response will include the algorithm number 3203 * and how many params it requires. That way we can change the EC code without 3204 * needing to update this file. We can also use a different algorithm on each 3205 * sensor. 3206 */ 3207 3208 /* This is the same struct for both v0 and v1. */ 3209 struct ec_params_tmp006_get_calibration { 3210 uint8_t index; 3211 } __ec_align1; 3212 3213 /* Version 0 */ 3214 struct ec_response_tmp006_get_calibration_v0 { 3215 float s0; 3216 float b0; 3217 float b1; 3218 float b2; 3219 } __ec_align4; 3220 3221 struct ec_params_tmp006_set_calibration_v0 { 3222 uint8_t index; 3223 uint8_t reserved[3]; 3224 float s0; 3225 float b0; 3226 float b1; 3227 float b2; 3228 } __ec_align4; 3229 3230 /* Version 1 */ 3231 struct ec_response_tmp006_get_calibration_v1 { 3232 uint8_t algorithm; 3233 uint8_t num_params; 3234 uint8_t reserved[2]; 3235 float val[]; 3236 } __ec_align4; 3237 3238 struct ec_params_tmp006_set_calibration_v1 { 3239 uint8_t index; 3240 uint8_t algorithm; 3241 uint8_t num_params; 3242 uint8_t reserved; 3243 float val[]; 3244 } __ec_align4; 3245 3246 3247 /* Read raw TMP006 data */ 3248 #define EC_CMD_TMP006_GET_RAW 0x0055 3249 3250 struct ec_params_tmp006_get_raw { 3251 uint8_t index; 3252 } __ec_align1; 3253 3254 struct ec_response_tmp006_get_raw { 3255 int32_t t; /* In 1/100 K */ 3256 int32_t v; /* In nV */ 3257 } __ec_align4; 3258 3259 /*****************************************************************************/ 3260 /* MKBP - Matrix KeyBoard Protocol */ 3261 3262 /* 3263 * Read key state 3264 * 3265 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for 3266 * expected response size. 3267 * 3268 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish 3269 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 3270 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 3271 */ 3272 #define EC_CMD_MKBP_STATE 0x0060 3273 3274 /* 3275 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 3276 */ 3277 #define EC_CMD_MKBP_INFO 0x0061 3278 3279 struct ec_response_mkbp_info { 3280 uint32_t rows; 3281 uint32_t cols; 3282 /* Formerly "switches", which was 0. */ 3283 uint8_t reserved; 3284 } __ec_align_size1; 3285 3286 struct ec_params_mkbp_info { 3287 uint8_t info_type; 3288 uint8_t event_type; 3289 } __ec_align1; 3290 3291 enum ec_mkbp_info_type { 3292 /* 3293 * Info about the keyboard matrix: number of rows and columns. 3294 * 3295 * Returns struct ec_response_mkbp_info. 3296 */ 3297 EC_MKBP_INFO_KBD = 0, 3298 3299 /* 3300 * For buttons and switches, info about which specifically are 3301 * supported. event_type must be set to one of the values in enum 3302 * ec_mkbp_event. 3303 * 3304 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte 3305 * bitmask indicating which buttons or switches are present. See the 3306 * bit inidices below. 3307 */ 3308 EC_MKBP_INFO_SUPPORTED = 1, 3309 3310 /* 3311 * Instantaneous state of buttons and switches. 3312 * 3313 * event_type must be set to one of the values in enum ec_mkbp_event. 3314 * 3315 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13] 3316 * indicating the current state of the keyboard matrix. 3317 * 3318 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw 3319 * event state. 3320 * 3321 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the 3322 * state of supported buttons. 3323 * 3324 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the 3325 * state of supported switches. 3326 */ 3327 EC_MKBP_INFO_CURRENT = 2, 3328 }; 3329 3330 /* Simulate key press */ 3331 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 3332 3333 struct ec_params_mkbp_simulate_key { 3334 uint8_t col; 3335 uint8_t row; 3336 uint8_t pressed; 3337 } __ec_align1; 3338 3339 #define EC_CMD_GET_KEYBOARD_ID 0x0063 3340 3341 struct ec_response_keyboard_id { 3342 uint32_t keyboard_id; 3343 } __ec_align4; 3344 3345 enum keyboard_id { 3346 KEYBOARD_ID_UNSUPPORTED = 0, 3347 KEYBOARD_ID_UNREADABLE = 0xffffffff, 3348 }; 3349 3350 /* Configure keyboard scanning */ 3351 #define EC_CMD_MKBP_SET_CONFIG 0x0064 3352 #define EC_CMD_MKBP_GET_CONFIG 0x0065 3353 3354 /* flags */ 3355 enum mkbp_config_flags { 3356 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */ 3357 }; 3358 3359 enum mkbp_config_valid { 3360 EC_MKBP_VALID_SCAN_PERIOD = BIT(0), 3361 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), 3362 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), 3363 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), 3364 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), 3365 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), 3366 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), 3367 }; 3368 3369 /* 3370 * Configuration for our key scanning algorithm. 3371 * 3372 * Note that this is used as a sub-structure of 3373 * ec_{params/response}_mkbp_get_config. 3374 */ 3375 struct ec_mkbp_config { 3376 uint32_t valid_mask; /* valid fields */ 3377 uint8_t flags; /* some flags (enum mkbp_config_flags) */ 3378 uint8_t valid_flags; /* which flags are valid */ 3379 uint16_t scan_period_us; /* period between start of scans */ 3380 /* revert to interrupt mode after no activity for this long */ 3381 uint32_t poll_timeout_us; 3382 /* 3383 * minimum post-scan relax time. Once we finish a scan we check 3384 * the time until we are due to start the next one. If this time is 3385 * shorter this field, we use this instead. 3386 */ 3387 uint16_t min_post_scan_delay_us; 3388 /* delay between setting up output and waiting for it to settle */ 3389 uint16_t output_settle_us; 3390 uint16_t debounce_down_us; /* time for debounce on key down */ 3391 uint16_t debounce_up_us; /* time for debounce on key up */ 3392 /* maximum depth to allow for fifo (0 = no keyscan output) */ 3393 uint8_t fifo_max_depth; 3394 } __ec_align_size1; 3395 3396 struct ec_params_mkbp_set_config { 3397 struct ec_mkbp_config config; 3398 } __ec_align_size1; 3399 3400 struct ec_response_mkbp_get_config { 3401 struct ec_mkbp_config config; 3402 } __ec_align_size1; 3403 3404 /* Run the key scan emulation */ 3405 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 3406 3407 enum ec_keyscan_seq_cmd { 3408 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ 3409 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */ 3410 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */ 3411 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */ 3412 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */ 3413 }; 3414 3415 enum ec_collect_flags { 3416 /* 3417 * Indicates this scan was processed by the EC. Due to timing, some 3418 * scans may be skipped. 3419 */ 3420 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), 3421 }; 3422 3423 struct ec_collect_item { 3424 uint8_t flags; /* some flags (enum ec_collect_flags) */ 3425 } __ec_align1; 3426 3427 struct ec_params_keyscan_seq_ctrl { 3428 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 3429 union { 3430 struct __ec_align1 { 3431 uint8_t active; /* still active */ 3432 uint8_t num_items; /* number of items */ 3433 /* Current item being presented */ 3434 uint8_t cur_item; 3435 } status; 3436 struct __ec_todo_unpacked { 3437 /* 3438 * Absolute time for this scan, measured from the 3439 * start of the sequence. 3440 */ 3441 uint32_t time_us; 3442 uint8_t scan[0]; /* keyscan data */ 3443 } add; 3444 struct __ec_align1 { 3445 uint8_t start_item; /* First item to return */ 3446 uint8_t num_items; /* Number of items to return */ 3447 } collect; 3448 }; 3449 } __ec_todo_packed; 3450 3451 struct ec_result_keyscan_seq_ctrl { 3452 union { 3453 struct __ec_todo_unpacked { 3454 uint8_t num_items; /* Number of items */ 3455 /* Data for each item */ 3456 struct ec_collect_item item[0]; 3457 } collect; 3458 }; 3459 } __ec_todo_packed; 3460 3461 /* 3462 * Get the next pending MKBP event. 3463 * 3464 * Returns EC_RES_UNAVAILABLE if there is no event pending. 3465 */ 3466 #define EC_CMD_GET_NEXT_EVENT 0x0067 3467 3468 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 3469 3470 /* 3471 * We use the most significant bit of the event type to indicate to the host 3472 * that the EC has more MKBP events available to provide. 3473 */ 3474 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) 3475 3476 /* The mask to apply to get the raw event type */ 3477 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) 3478 3479 enum ec_mkbp_event { 3480 /* Keyboard matrix changed. The event data is the new matrix state. */ 3481 EC_MKBP_EVENT_KEY_MATRIX = 0, 3482 3483 /* New host event. The event data is 4 bytes of host event flags. */ 3484 EC_MKBP_EVENT_HOST_EVENT = 1, 3485 3486 /* New Sensor FIFO data. The event data is fifo_info structure. */ 3487 EC_MKBP_EVENT_SENSOR_FIFO = 2, 3488 3489 /* The state of the non-matrixed buttons have changed. */ 3490 EC_MKBP_EVENT_BUTTON = 3, 3491 3492 /* The state of the switches have changed. */ 3493 EC_MKBP_EVENT_SWITCH = 4, 3494 3495 /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 3496 EC_MKBP_EVENT_FINGERPRINT = 5, 3497 3498 /* 3499 * Sysrq event: send emulated sysrq. The event data is sysrq, 3500 * corresponding to the key to be pressed. 3501 */ 3502 EC_MKBP_EVENT_SYSRQ = 6, 3503 3504 /* 3505 * New 64-bit host event. 3506 * The event data is 8 bytes of host event flags. 3507 */ 3508 EC_MKBP_EVENT_HOST_EVENT64 = 7, 3509 3510 /* Notify the AP that something happened on CEC */ 3511 EC_MKBP_EVENT_CEC_EVENT = 8, 3512 3513 /* Send an incoming CEC message to the AP */ 3514 EC_MKBP_EVENT_CEC_MESSAGE = 9, 3515 3516 /* Peripheral device charger event */ 3517 EC_MKBP_EVENT_PCHG = 12, 3518 3519 /* Number of MKBP events */ 3520 EC_MKBP_EVENT_COUNT, 3521 }; 3522 BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); 3523 3524 union __ec_align_offset1 ec_response_get_next_data { 3525 uint8_t key_matrix[13]; 3526 3527 /* Unaligned */ 3528 uint32_t host_event; 3529 uint64_t host_event64; 3530 3531 struct __ec_todo_unpacked { 3532 /* For aligning the fifo_info */ 3533 uint8_t reserved[3]; 3534 struct ec_response_motion_sense_fifo_info info; 3535 } sensor_fifo; 3536 3537 uint32_t buttons; 3538 3539 uint32_t switches; 3540 3541 uint32_t fp_events; 3542 3543 uint32_t sysrq; 3544 3545 /* CEC events from enum mkbp_cec_event */ 3546 uint32_t cec_events; 3547 }; 3548 3549 union __ec_align_offset1 ec_response_get_next_data_v1 { 3550 uint8_t key_matrix[16]; 3551 3552 /* Unaligned */ 3553 uint32_t host_event; 3554 uint64_t host_event64; 3555 3556 struct __ec_todo_unpacked { 3557 /* For aligning the fifo_info */ 3558 uint8_t reserved[3]; 3559 struct ec_response_motion_sense_fifo_info info; 3560 } sensor_fifo; 3561 3562 uint32_t buttons; 3563 3564 uint32_t switches; 3565 3566 uint32_t fp_events; 3567 3568 uint32_t sysrq; 3569 3570 /* CEC events from enum mkbp_cec_event */ 3571 uint32_t cec_events; 3572 3573 uint8_t cec_message[16]; 3574 }; 3575 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); 3576 3577 union __ec_align_offset1 ec_response_get_next_data_v3 { 3578 uint8_t key_matrix[18]; 3579 3580 /* Unaligned */ 3581 uint32_t host_event; 3582 uint64_t host_event64; 3583 3584 struct __ec_todo_unpacked { 3585 /* For aligning the fifo_info */ 3586 uint8_t reserved[3]; 3587 struct ec_response_motion_sense_fifo_info info; 3588 } sensor_fifo; 3589 3590 uint32_t buttons; 3591 3592 uint32_t switches; 3593 3594 uint32_t fp_events; 3595 3596 uint32_t sysrq; 3597 3598 /* CEC events from enum mkbp_cec_event */ 3599 uint32_t cec_events; 3600 3601 uint8_t cec_message[16]; 3602 }; 3603 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v3) == 18); 3604 3605 struct ec_response_get_next_event { 3606 uint8_t event_type; 3607 /* Followed by event data if any */ 3608 union ec_response_get_next_data data; 3609 } __ec_align1; 3610 3611 struct ec_response_get_next_event_v1 { 3612 uint8_t event_type; 3613 /* Followed by event data if any */ 3614 union ec_response_get_next_data_v1 data; 3615 } __ec_align1; 3616 3617 struct ec_response_get_next_event_v3 { 3618 uint8_t event_type; 3619 /* Followed by event data if any */ 3620 union ec_response_get_next_data_v3 data; 3621 } __ec_align1; 3622 3623 /* Bit indices for buttons and switches.*/ 3624 /* Buttons */ 3625 #define EC_MKBP_POWER_BUTTON 0 3626 #define EC_MKBP_VOL_UP 1 3627 #define EC_MKBP_VOL_DOWN 2 3628 #define EC_MKBP_RECOVERY 3 3629 #define EC_MKBP_BRI_UP 4 3630 #define EC_MKBP_BRI_DOWN 5 3631 #define EC_MKBP_SCREEN_LOCK 6 3632 3633 /* Switches */ 3634 #define EC_MKBP_LID_OPEN 0 3635 #define EC_MKBP_TABLET_MODE 1 3636 #define EC_MKBP_BASE_ATTACHED 2 3637 #define EC_MKBP_FRONT_PROXIMITY 3 3638 3639 /* Run keyboard factory test scanning */ 3640 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 3641 3642 struct ec_response_keyboard_factory_test { 3643 uint16_t shorted; /* Keyboard pins are shorted */ 3644 } __ec_align2; 3645 3646 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 3647 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 3648 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) 3649 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 3650 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ 3651 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) 3652 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 3653 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 3654 #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ 3655 >> EC_MKBP_FP_MATCH_IDX_OFFSET) 3656 #define EC_MKBP_FP_ENROLL BIT(27) 3657 #define EC_MKBP_FP_MATCH BIT(28) 3658 #define EC_MKBP_FP_FINGER_DOWN BIT(29) 3659 #define EC_MKBP_FP_FINGER_UP BIT(30) 3660 #define EC_MKBP_FP_IMAGE_READY BIT(31) 3661 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ 3662 #define EC_MKBP_FP_ERR_ENROLL_OK 0 3663 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 3664 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 3665 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 3666 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 3667 /* Can be used to detect if image was usable for enrollment or not. */ 3668 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 3669 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ 3670 #define EC_MKBP_FP_ERR_MATCH_NO 0 3671 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 3672 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 3673 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 3674 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 3675 #define EC_MKBP_FP_ERR_MATCH_YES 1 3676 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 3677 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 3678 3679 3680 /*****************************************************************************/ 3681 /* Temperature sensor commands */ 3682 3683 /* Read temperature sensor info */ 3684 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3685 3686 struct ec_params_temp_sensor_get_info { 3687 uint8_t id; 3688 } __ec_align1; 3689 3690 struct ec_response_temp_sensor_get_info { 3691 char sensor_name[32]; 3692 uint8_t sensor_type; 3693 } __ec_align1; 3694 3695 /*****************************************************************************/ 3696 3697 /* 3698 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI 3699 * commands accidentally sent to the wrong interface. See the ACPI section 3700 * below. 3701 */ 3702 3703 /*****************************************************************************/ 3704 /* Host event commands */ 3705 3706 3707 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ 3708 /* 3709 * Host event mask params and response structures, shared by all of the host 3710 * event commands below. 3711 */ 3712 struct ec_params_host_event_mask { 3713 uint32_t mask; 3714 } __ec_align4; 3715 3716 struct ec_response_host_event_mask { 3717 uint32_t mask; 3718 } __ec_align4; 3719 3720 /* These all use ec_response_host_event_mask */ 3721 #define EC_CMD_HOST_EVENT_GET_B 0x0087 3722 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 3723 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 3724 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3725 3726 /* These all use ec_params_host_event_mask */ 3727 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 3728 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 3729 #define EC_CMD_HOST_EVENT_CLEAR 0x008C 3730 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 3731 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 3732 3733 /* 3734 * Unified host event programming interface - Should be used by newer versions 3735 * of BIOS/OS to program host events and masks 3736 */ 3737 3738 struct ec_params_host_event { 3739 3740 /* Action requested by host - one of enum ec_host_event_action. */ 3741 uint8_t action; 3742 3743 /* 3744 * Mask type that the host requested the action on - one of 3745 * enum ec_host_event_mask_type. 3746 */ 3747 uint8_t mask_type; 3748 3749 /* Set to 0, ignore on read */ 3750 uint16_t reserved; 3751 3752 /* Value to be used in case of set operations. */ 3753 uint64_t value; 3754 } __ec_align4; 3755 3756 /* 3757 * Response structure returned by EC_CMD_HOST_EVENT. 3758 * Update the value on a GET request. Set to 0 on GET/CLEAR 3759 */ 3760 3761 struct ec_response_host_event { 3762 3763 /* Mask value in case of get operation */ 3764 uint64_t value; 3765 } __ec_align4; 3766 3767 enum ec_host_event_action { 3768 /* 3769 * params.value is ignored. Value of mask_type populated 3770 * in response.value 3771 */ 3772 EC_HOST_EVENT_GET, 3773 3774 /* Bits in params.value are set */ 3775 EC_HOST_EVENT_SET, 3776 3777 /* Bits in params.value are cleared */ 3778 EC_HOST_EVENT_CLEAR, 3779 }; 3780 3781 enum ec_host_event_mask_type { 3782 3783 /* Main host event copy */ 3784 EC_HOST_EVENT_MAIN, 3785 3786 /* Copy B of host events */ 3787 EC_HOST_EVENT_B, 3788 3789 /* SCI Mask */ 3790 EC_HOST_EVENT_SCI_MASK, 3791 3792 /* SMI Mask */ 3793 EC_HOST_EVENT_SMI_MASK, 3794 3795 /* Mask of events that should be always reported in hostevents */ 3796 EC_HOST_EVENT_ALWAYS_REPORT_MASK, 3797 3798 /* Active wake mask */ 3799 EC_HOST_EVENT_ACTIVE_WAKE_MASK, 3800 3801 /* Lazy wake mask for S0ix */ 3802 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 3803 3804 /* Lazy wake mask for S3 */ 3805 EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 3806 3807 /* Lazy wake mask for S5 */ 3808 EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 3809 }; 3810 3811 #define EC_CMD_HOST_EVENT 0x00A4 3812 3813 /*****************************************************************************/ 3814 /* Switch commands */ 3815 3816 /* Enable/disable LCD backlight */ 3817 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3818 3819 struct ec_params_switch_enable_backlight { 3820 uint8_t enabled; 3821 } __ec_align1; 3822 3823 /* Enable/disable WLAN/Bluetooth */ 3824 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3825 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 3826 3827 /* Version 0 params; no response */ 3828 struct ec_params_switch_enable_wireless_v0 { 3829 uint8_t enabled; 3830 } __ec_align1; 3831 3832 /* Version 1 params */ 3833 struct ec_params_switch_enable_wireless_v1 { 3834 /* Flags to enable now */ 3835 uint8_t now_flags; 3836 3837 /* Which flags to copy from now_flags */ 3838 uint8_t now_mask; 3839 3840 /* 3841 * Flags to leave enabled in S3, if they're on at the S0->S3 3842 * transition. (Other flags will be disabled by the S0->S3 3843 * transition.) 3844 */ 3845 uint8_t suspend_flags; 3846 3847 /* Which flags to copy from suspend_flags */ 3848 uint8_t suspend_mask; 3849 } __ec_align1; 3850 3851 /* Version 1 response */ 3852 struct ec_response_switch_enable_wireless_v1 { 3853 /* Flags to enable now */ 3854 uint8_t now_flags; 3855 3856 /* Flags to leave enabled in S3 */ 3857 uint8_t suspend_flags; 3858 } __ec_align1; 3859 3860 /*****************************************************************************/ 3861 /* GPIO commands. Only available on EC if write protect has been disabled. */ 3862 3863 /* Set GPIO output value */ 3864 #define EC_CMD_GPIO_SET 0x0092 3865 3866 struct ec_params_gpio_set { 3867 char name[32]; 3868 uint8_t val; 3869 } __ec_align1; 3870 3871 /* Get GPIO value */ 3872 #define EC_CMD_GPIO_GET 0x0093 3873 3874 /* Version 0 of input params and response */ 3875 struct ec_params_gpio_get { 3876 char name[32]; 3877 } __ec_align1; 3878 3879 struct ec_response_gpio_get { 3880 uint8_t val; 3881 } __ec_align1; 3882 3883 /* Version 1 of input params and response */ 3884 struct ec_params_gpio_get_v1 { 3885 uint8_t subcmd; 3886 union { 3887 struct __ec_align1 { 3888 char name[32]; 3889 } get_value_by_name; 3890 struct __ec_align1 { 3891 uint8_t index; 3892 } get_info; 3893 }; 3894 } __ec_align1; 3895 3896 struct ec_response_gpio_get_v1 { 3897 union { 3898 struct __ec_align1 { 3899 uint8_t val; 3900 } get_value_by_name, get_count; 3901 struct __ec_todo_unpacked { 3902 uint8_t val; 3903 char name[32]; 3904 uint32_t flags; 3905 } get_info; 3906 }; 3907 } __ec_todo_packed; 3908 3909 enum gpio_get_subcmd { 3910 EC_GPIO_GET_BY_NAME = 0, 3911 EC_GPIO_GET_COUNT = 1, 3912 EC_GPIO_GET_INFO = 2, 3913 }; 3914 3915 /*****************************************************************************/ 3916 /* I2C commands. Only available when flash write protect is unlocked. */ 3917 3918 /* 3919 * CAUTION: These commands are deprecated, and are not supported anymore in EC 3920 * builds >= 8398.0.0 (see crosbug.com/p/23570). 3921 * 3922 * Use EC_CMD_I2C_PASSTHRU instead. 3923 */ 3924 3925 /* Read I2C bus */ 3926 #define EC_CMD_I2C_READ 0x0094 3927 3928 struct ec_params_i2c_read { 3929 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3930 uint8_t read_size; /* Either 8 or 16. */ 3931 uint8_t port; 3932 uint8_t offset; 3933 } __ec_align_size1; 3934 3935 struct ec_response_i2c_read { 3936 uint16_t data; 3937 } __ec_align2; 3938 3939 /* Write I2C bus */ 3940 #define EC_CMD_I2C_WRITE 0x0095 3941 3942 struct ec_params_i2c_write { 3943 uint16_t data; 3944 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3945 uint8_t write_size; /* Either 8 or 16. */ 3946 uint8_t port; 3947 uint8_t offset; 3948 } __ec_align_size1; 3949 3950 /*****************************************************************************/ 3951 /* Charge state commands. Only available when flash write protect unlocked. */ 3952 3953 /* Force charge state machine to stop charging the battery or force it to 3954 * discharge the battery. 3955 */ 3956 #define EC_CMD_CHARGE_CONTROL 0x0096 3957 #define EC_VER_CHARGE_CONTROL 3 3958 3959 enum ec_charge_control_mode { 3960 CHARGE_CONTROL_NORMAL = 0, 3961 CHARGE_CONTROL_IDLE, 3962 CHARGE_CONTROL_DISCHARGE, 3963 /* Add no more entry below. */ 3964 CHARGE_CONTROL_COUNT, 3965 }; 3966 3967 #define EC_CHARGE_MODE_TEXT \ 3968 { \ 3969 [CHARGE_CONTROL_NORMAL] = "NORMAL", \ 3970 [CHARGE_CONTROL_IDLE] = "IDLE", \ 3971 [CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \ 3972 } 3973 3974 enum ec_charge_control_cmd { 3975 EC_CHARGE_CONTROL_CMD_SET = 0, 3976 EC_CHARGE_CONTROL_CMD_GET, 3977 }; 3978 3979 enum ec_charge_control_flag { 3980 EC_CHARGE_CONTROL_FLAG_NO_IDLE = BIT(0), 3981 }; 3982 3983 struct ec_params_charge_control { 3984 uint32_t mode; /* enum charge_control_mode */ 3985 3986 /* Below are the fields added in V2. */ 3987 uint8_t cmd; /* enum ec_charge_control_cmd. */ 3988 uint8_t flags; /* enum ec_charge_control_flag (v3+) */ 3989 /* 3990 * Lower and upper thresholds for battery sustainer. This struct isn't 3991 * named to avoid tainting foreign projects' name spaces. 3992 * 3993 * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer 3994 * will be disabled. To disable battery sustainer, set mode=NORMAL, 3995 * lower=-1, upper=-1. 3996 */ 3997 struct { 3998 int8_t lower; /* Display SoC in percentage. */ 3999 int8_t upper; /* Display SoC in percentage. */ 4000 } sustain_soc; 4001 } __ec_align4; 4002 4003 /* Added in v2 */ 4004 struct ec_response_charge_control { 4005 uint32_t mode; /* enum charge_control_mode */ 4006 struct { /* Battery sustainer thresholds */ 4007 int8_t lower; 4008 int8_t upper; 4009 } sustain_soc; 4010 uint8_t flags; /* enum ec_charge_control_flag (v3+) */ 4011 uint8_t reserved; 4012 } __ec_align4; 4013 4014 /*****************************************************************************/ 4015 4016 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 4017 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 4018 4019 /* 4020 * Read data from the saved snapshot. If the subcmd parameter is 4021 * CONSOLE_READ_NEXT, this will return data starting from the beginning of 4022 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the 4023 * end of the previous snapshot. 4024 * 4025 * The params are only looked at in version >= 1 of this command. Prior 4026 * versions will just default to CONSOLE_READ_NEXT behavior. 4027 * 4028 * Response is null-terminated string. Empty string, if there is no more 4029 * remaining output. 4030 */ 4031 #define EC_CMD_CONSOLE_READ 0x0098 4032 4033 enum ec_console_read_subcmd { 4034 CONSOLE_READ_NEXT = 0, 4035 CONSOLE_READ_RECENT 4036 }; 4037 4038 struct ec_params_console_read_v1 { 4039 uint8_t subcmd; /* enum ec_console_read_subcmd */ 4040 } __ec_align1; 4041 4042 /*****************************************************************************/ 4043 4044 /* 4045 * Cut off battery power immediately or after the host has shut down. 4046 * 4047 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery. 4048 * EC_RES_SUCCESS if the command was successful. 4049 * EC_RES_ERROR if the cut off command failed. 4050 */ 4051 #define EC_CMD_BATTERY_CUT_OFF 0x0099 4052 4053 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) 4054 4055 struct ec_params_battery_cutoff { 4056 uint8_t flags; 4057 } __ec_align1; 4058 4059 /*****************************************************************************/ 4060 /* USB port mux control. */ 4061 4062 /* 4063 * Switch USB mux or return to automatic switching. 4064 */ 4065 #define EC_CMD_USB_MUX 0x009A 4066 4067 struct ec_params_usb_mux { 4068 uint8_t mux; 4069 } __ec_align1; 4070 4071 /*****************************************************************************/ 4072 /* LDOs / FETs control. */ 4073 4074 enum ec_ldo_state { 4075 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */ 4076 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */ 4077 }; 4078 4079 /* 4080 * Switch on/off a LDO. 4081 */ 4082 #define EC_CMD_LDO_SET 0x009B 4083 4084 struct ec_params_ldo_set { 4085 uint8_t index; 4086 uint8_t state; 4087 } __ec_align1; 4088 4089 /* 4090 * Get LDO state. 4091 */ 4092 #define EC_CMD_LDO_GET 0x009C 4093 4094 struct ec_params_ldo_get { 4095 uint8_t index; 4096 } __ec_align1; 4097 4098 struct ec_response_ldo_get { 4099 uint8_t state; 4100 } __ec_align1; 4101 4102 /*****************************************************************************/ 4103 /* Power info. */ 4104 4105 /* 4106 * Get power info. 4107 */ 4108 #define EC_CMD_POWER_INFO 0x009D 4109 4110 struct ec_response_power_info { 4111 uint32_t usb_dev_type; 4112 uint16_t voltage_ac; 4113 uint16_t voltage_system; 4114 uint16_t current_system; 4115 uint16_t usb_current_limit; 4116 } __ec_align4; 4117 4118 /*****************************************************************************/ 4119 /* I2C passthru command */ 4120 4121 #define EC_CMD_I2C_PASSTHRU 0x009E 4122 4123 /* Read data; if not present, message is a write */ 4124 #define EC_I2C_FLAG_READ BIT(15) 4125 4126 /* Mask for address */ 4127 #define EC_I2C_ADDR_MASK 0x3ff 4128 4129 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ 4130 #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ 4131 4132 /* Any error */ 4133 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) 4134 4135 struct ec_params_i2c_passthru_msg { 4136 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 4137 uint16_t len; /* Number of bytes to read or write */ 4138 } __ec_align2; 4139 4140 struct ec_params_i2c_passthru { 4141 uint8_t port; /* I2C port number */ 4142 uint8_t num_msgs; /* Number of messages */ 4143 struct ec_params_i2c_passthru_msg msg[]; 4144 /* Data to write for all messages is concatenated here */ 4145 } __ec_align2; 4146 4147 struct ec_response_i2c_passthru { 4148 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 4149 uint8_t num_msgs; /* Number of messages processed */ 4150 uint8_t data[]; /* Data read by messages concatenated here */ 4151 } __ec_align1; 4152 4153 /*****************************************************************************/ 4154 /* AP hang detect */ 4155 #define EC_CMD_HANG_DETECT 0x009F 4156 4157 #define EC_HANG_DETECT_MIN_TIMEOUT 5 4158 #define EC_HANG_DETECT_MAX_TIMEOUT 65535 4159 4160 /* EC hang detect commands */ 4161 enum ec_hang_detect_cmds { 4162 /* Reload AP hang detect timer. */ 4163 EC_HANG_DETECT_CMD_RELOAD = 0x0, 4164 4165 /* Stop AP hang detect timer. */ 4166 EC_HANG_DETECT_CMD_CANCEL = 0x1, 4167 4168 /* Configure watchdog with given reboot timeout and 4169 * cancel currently running AP hang detect timer. 4170 */ 4171 EC_HANG_DETECT_CMD_SET_TIMEOUT = 0x2, 4172 4173 /* Get last hang status - whether the AP boot was clear or not */ 4174 EC_HANG_DETECT_CMD_GET_STATUS = 0x3, 4175 4176 /* Clear last hang status. Called when AP is rebooting/shutting down 4177 * gracefully. 4178 */ 4179 EC_HANG_DETECT_CMD_CLEAR_STATUS = 0x4 4180 }; 4181 4182 struct ec_params_hang_detect { 4183 uint16_t command; /* enum ec_hang_detect_cmds */ 4184 /* Timeout in seconds before generating reboot */ 4185 uint16_t reboot_timeout_sec; 4186 } __ec_align2; 4187 4188 /* Status codes that describe whether AP has boot normally or the hang has been 4189 * detected and EC has reset AP 4190 */ 4191 enum ec_hang_detect_status { 4192 EC_HANG_DETECT_AP_BOOT_NORMAL = 0x0, 4193 EC_HANG_DETECT_AP_BOOT_EC_WDT = 0x1, 4194 EC_HANG_DETECT_AP_BOOT_COUNT, 4195 }; 4196 4197 struct ec_response_hang_detect { 4198 uint8_t status; /* enum ec_hang_detect_status */ 4199 } __ec_align1; 4200 /*****************************************************************************/ 4201 /* Commands for battery charging */ 4202 4203 /* 4204 * This is the single catch-all host command to exchange data regarding the 4205 * charge state machine (v2 and up). 4206 */ 4207 #define EC_CMD_CHARGE_STATE 0x00A0 4208 4209 /* Subcommands for this host command */ 4210 enum charge_state_command { 4211 CHARGE_STATE_CMD_GET_STATE, 4212 CHARGE_STATE_CMD_GET_PARAM, 4213 CHARGE_STATE_CMD_SET_PARAM, 4214 CHARGE_STATE_NUM_CMDS 4215 }; 4216 4217 /* 4218 * Known param numbers are defined here. Ranges are reserved for board-specific 4219 * params, which are handled by the particular implementations. 4220 */ 4221 enum charge_state_params { 4222 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */ 4223 CS_PARAM_CHG_CURRENT, /* charger current limit */ 4224 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 4225 CS_PARAM_CHG_STATUS, /* charger-specific status */ 4226 CS_PARAM_CHG_OPTION, /* charger-specific options */ 4227 CS_PARAM_LIMIT_POWER, /* 4228 * Check if power is limited due to 4229 * low battery and / or a weak external 4230 * charger. READ ONLY. 4231 */ 4232 /* How many so far? */ 4233 CS_NUM_BASE_PARAMS, 4234 4235 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */ 4236 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 4237 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 4238 4239 /* Range for CONFIG_CHARGE_STATE_DEBUG params */ 4240 CS_PARAM_DEBUG_MIN = 0x20000, 4241 CS_PARAM_DEBUG_CTL_MODE = 0x20000, 4242 CS_PARAM_DEBUG_MANUAL_MODE, 4243 CS_PARAM_DEBUG_SEEMS_DEAD, 4244 CS_PARAM_DEBUG_SEEMS_DISCONNECTED, 4245 CS_PARAM_DEBUG_BATT_REMOVED, 4246 CS_PARAM_DEBUG_MANUAL_CURRENT, 4247 CS_PARAM_DEBUG_MANUAL_VOLTAGE, 4248 CS_PARAM_DEBUG_MAX = 0x2ffff, 4249 4250 /* Other custom param ranges go here... */ 4251 }; 4252 4253 struct ec_params_charge_state { 4254 uint8_t cmd; /* enum charge_state_command */ 4255 union { 4256 /* get_state has no args */ 4257 4258 struct __ec_todo_unpacked { 4259 uint32_t param; /* enum charge_state_param */ 4260 } get_param; 4261 4262 struct __ec_todo_unpacked { 4263 uint32_t param; /* param to set */ 4264 uint32_t value; /* value to set */ 4265 } set_param; 4266 }; 4267 } __ec_todo_packed; 4268 4269 struct ec_response_charge_state { 4270 union { 4271 struct __ec_align4 { 4272 int ac; 4273 int chg_voltage; 4274 int chg_current; 4275 int chg_input_current; 4276 int batt_state_of_charge; 4277 } get_state; 4278 4279 struct __ec_align4 { 4280 uint32_t value; 4281 } get_param; 4282 4283 /* set_param returns no args */ 4284 }; 4285 } __ec_align4; 4286 4287 4288 /* 4289 * Set maximum battery charging current. 4290 */ 4291 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 4292 4293 struct ec_params_current_limit { 4294 uint32_t limit; /* in mA */ 4295 } __ec_align4; 4296 4297 /* 4298 * Set maximum external voltage / current. 4299 */ 4300 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2 4301 4302 /* Command v0 is used only on Spring and is obsolete + unsupported */ 4303 struct ec_params_external_power_limit_v1 { 4304 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 4305 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 4306 } __ec_align2; 4307 4308 #define EC_POWER_LIMIT_NONE 0xffff 4309 4310 /* 4311 * Set maximum voltage & current of a dedicated charge port 4312 */ 4313 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 4314 4315 struct ec_params_dedicated_charger_limit { 4316 uint16_t current_lim; /* in mA */ 4317 uint16_t voltage_lim; /* in mV */ 4318 } __ec_align2; 4319 4320 /*****************************************************************************/ 4321 /* Hibernate/Deep Sleep Commands */ 4322 4323 /* Set the delay before going into hibernation. */ 4324 #define EC_CMD_HIBERNATION_DELAY 0x00A8 4325 4326 struct ec_params_hibernation_delay { 4327 /* 4328 * Seconds to wait in G3 before hibernate. Pass in 0 to read the 4329 * current settings without changing them. 4330 */ 4331 uint32_t seconds; 4332 } __ec_align4; 4333 4334 struct ec_response_hibernation_delay { 4335 /* 4336 * The current time in seconds in which the system has been in the G3 4337 * state. This value is reset if the EC transitions out of G3. 4338 */ 4339 uint32_t time_g3; 4340 4341 /* 4342 * The current time remaining in seconds until the EC should hibernate. 4343 * This value is also reset if the EC transitions out of G3. 4344 */ 4345 uint32_t time_remaining; 4346 4347 /* 4348 * The current time in seconds that the EC should wait in G3 before 4349 * hibernating. 4350 */ 4351 uint32_t hibernate_delay; 4352 } __ec_align4; 4353 4354 /* Inform the EC when entering a sleep state */ 4355 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 4356 4357 enum host_sleep_event { 4358 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 4359 HOST_SLEEP_EVENT_S3_RESUME = 2, 4360 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 4361 HOST_SLEEP_EVENT_S0IX_RESUME = 4, 4362 /* S3 suspend with additional enabled wake sources */ 4363 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, 4364 }; 4365 4366 struct ec_params_host_sleep_event { 4367 uint8_t sleep_event; 4368 } __ec_align1; 4369 4370 /* 4371 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep 4372 * transition failures 4373 */ 4374 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0 4375 4376 /* Disable timeout detection for this sleep transition */ 4377 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF 4378 4379 struct ec_params_host_sleep_event_v1 { 4380 /* The type of sleep being entered or exited. */ 4381 uint8_t sleep_event; 4382 4383 /* Padding */ 4384 uint8_t reserved; 4385 union { 4386 /* Parameters that apply for suspend messages. */ 4387 struct { 4388 /* 4389 * The timeout in milliseconds between when this message 4390 * is received and when the EC will declare sleep 4391 * transition failure if the sleep signal is not 4392 * asserted. 4393 */ 4394 uint16_t sleep_timeout_ms; 4395 } suspend_params; 4396 4397 /* No parameters for non-suspend messages. */ 4398 }; 4399 } __ec_align2; 4400 4401 /* A timeout occurred when this bit is set */ 4402 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 4403 4404 /* 4405 * The mask defining which bits correspond to the number of sleep transitions, 4406 * as well as the maximum number of suspend line transitions that will be 4407 * reported back to the host. 4408 */ 4409 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF 4410 4411 struct ec_response_host_sleep_event_v1 { 4412 union { 4413 /* Response fields that apply for resume messages. */ 4414 struct { 4415 /* 4416 * The number of sleep power signal transitions that 4417 * occurred since the suspend message. The high bit 4418 * indicates a timeout occurred. 4419 */ 4420 uint32_t sleep_transitions; 4421 } resume_response; 4422 4423 /* No response fields for non-resume messages. */ 4424 }; 4425 } __ec_align4; 4426 4427 /*****************************************************************************/ 4428 /* Device events */ 4429 #define EC_CMD_DEVICE_EVENT 0x00AA 4430 4431 enum ec_device_event { 4432 EC_DEVICE_EVENT_TRACKPAD, 4433 EC_DEVICE_EVENT_DSP, 4434 EC_DEVICE_EVENT_WIFI, 4435 EC_DEVICE_EVENT_WLC, 4436 }; 4437 4438 enum ec_device_event_param { 4439 /* Get and clear pending device events */ 4440 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 4441 /* Get device event mask */ 4442 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 4443 /* Set device event mask */ 4444 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 4445 }; 4446 4447 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) 4448 4449 struct ec_params_device_event { 4450 uint32_t event_mask; 4451 uint8_t param; 4452 } __ec_align_size1; 4453 4454 struct ec_response_device_event { 4455 uint32_t event_mask; 4456 } __ec_align4; 4457 4458 /*****************************************************************************/ 4459 /* Smart battery pass-through */ 4460 4461 /* Get / Set 16-bit smart battery registers */ 4462 #define EC_CMD_SB_READ_WORD 0x00B0 4463 #define EC_CMD_SB_WRITE_WORD 0x00B1 4464 4465 /* Get / Set string smart battery parameters 4466 * formatted as SMBUS "block". 4467 */ 4468 #define EC_CMD_SB_READ_BLOCK 0x00B2 4469 #define EC_CMD_SB_WRITE_BLOCK 0x00B3 4470 4471 struct ec_params_sb_rd { 4472 uint8_t reg; 4473 } __ec_align1; 4474 4475 struct ec_response_sb_rd_word { 4476 uint16_t value; 4477 } __ec_align2; 4478 4479 struct ec_params_sb_wr_word { 4480 uint8_t reg; 4481 uint16_t value; 4482 } __ec_align1; 4483 4484 struct ec_response_sb_rd_block { 4485 uint8_t data[32]; 4486 } __ec_align1; 4487 4488 struct ec_params_sb_wr_block { 4489 uint8_t reg; 4490 uint16_t data[32]; 4491 } __ec_align1; 4492 4493 /*****************************************************************************/ 4494 /* Battery vendor parameters 4495 * 4496 * Get or set vendor-specific parameters in the battery. Implementations may 4497 * differ between boards or batteries. On a set operation, the response 4498 * contains the actual value set, which may be rounded or clipped from the 4499 * requested value. 4500 */ 4501 4502 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 4503 4504 enum ec_battery_vendor_param_mode { 4505 BATTERY_VENDOR_PARAM_MODE_GET = 0, 4506 BATTERY_VENDOR_PARAM_MODE_SET, 4507 }; 4508 4509 struct ec_params_battery_vendor_param { 4510 uint32_t param; 4511 uint32_t value; 4512 uint8_t mode; 4513 } __ec_align_size1; 4514 4515 struct ec_response_battery_vendor_param { 4516 uint32_t value; 4517 } __ec_align4; 4518 4519 /*****************************************************************************/ 4520 /* 4521 * Smart Battery Firmware Update Commands 4522 */ 4523 #define EC_CMD_SB_FW_UPDATE 0x00B5 4524 4525 enum ec_sb_fw_update_subcmd { 4526 EC_SB_FW_UPDATE_PREPARE = 0x0, 4527 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 4528 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 4529 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 4530 EC_SB_FW_UPDATE_END = 0x4, 4531 EC_SB_FW_UPDATE_STATUS = 0x5, 4532 EC_SB_FW_UPDATE_PROTECT = 0x6, 4533 EC_SB_FW_UPDATE_MAX = 0x7, 4534 }; 4535 4536 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 4537 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 4538 #define SB_FW_UPDATE_CMD_INFO_SIZE 8 4539 4540 struct ec_sb_fw_update_header { 4541 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 4542 uint16_t fw_id; /* firmware id */ 4543 } __ec_align4; 4544 4545 struct ec_params_sb_fw_update { 4546 struct ec_sb_fw_update_header hdr; 4547 union { 4548 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 4549 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4550 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 4551 /* EC_SB_FW_UPDATE_END = 0x4 */ 4552 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4553 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 4554 /* Those have no args */ 4555 4556 /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 4557 struct __ec_align4 { 4558 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 4559 } write; 4560 }; 4561 } __ec_align4; 4562 4563 struct ec_response_sb_fw_update { 4564 union { 4565 /* EC_SB_FW_UPDATE_INFO = 0x1 */ 4566 struct __ec_align1 { 4567 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 4568 } info; 4569 4570 /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 4571 struct __ec_align1 { 4572 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 4573 } status; 4574 }; 4575 } __ec_align1; 4576 4577 /* 4578 * Entering Verified Boot Mode Command 4579 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 4580 * Valid Modes are: normal, developer, and recovery. 4581 */ 4582 #define EC_CMD_ENTERING_MODE 0x00B6 4583 4584 struct ec_params_entering_mode { 4585 int vboot_mode; 4586 } __ec_align4; 4587 4588 #define VBOOT_MODE_NORMAL 0 4589 #define VBOOT_MODE_DEVELOPER 1 4590 #define VBOOT_MODE_RECOVERY 2 4591 4592 /*****************************************************************************/ 4593 /* 4594 * I2C passthru protection command: Protects I2C tunnels against access on 4595 * certain addresses (board-specific). 4596 */ 4597 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 4598 4599 enum ec_i2c_passthru_protect_subcmd { 4600 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 4601 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 4602 }; 4603 4604 struct ec_params_i2c_passthru_protect { 4605 uint8_t subcmd; 4606 uint8_t port; /* I2C port number */ 4607 } __ec_align1; 4608 4609 struct ec_response_i2c_passthru_protect { 4610 uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 4611 } __ec_align1; 4612 4613 4614 /*****************************************************************************/ 4615 /* 4616 * HDMI CEC commands 4617 * 4618 * These commands are for sending and receiving message via HDMI CEC 4619 */ 4620 4621 #define EC_CEC_MAX_PORTS 16 4622 4623 #define MAX_CEC_MSG_LEN 16 4624 4625 /* 4626 * Helper macros for packing/unpacking cec_events. 4627 * bits[27:0] : bitmask of events from enum mkbp_cec_event 4628 * bits[31:28]: port number 4629 */ 4630 #define EC_MKBP_EVENT_CEC_PACK(events, port) \ 4631 (((events) & GENMASK(27, 0)) | (((port) & 0xf) << 28)) 4632 #define EC_MKBP_EVENT_CEC_GET_EVENTS(event) ((event) & GENMASK(27, 0)) 4633 #define EC_MKBP_EVENT_CEC_GET_PORT(event) (((event) >> 28) & 0xf) 4634 4635 /* CEC message from the AP to be written on the CEC bus */ 4636 #define EC_CMD_CEC_WRITE_MSG 0x00B8 4637 4638 /** 4639 * struct ec_params_cec_write - Message to write to the CEC bus 4640 * @msg: message content to write to the CEC bus 4641 */ 4642 struct ec_params_cec_write { 4643 uint8_t msg[MAX_CEC_MSG_LEN]; 4644 } __ec_align1; 4645 4646 /** 4647 * struct ec_params_cec_write_v1 - Message to write to the CEC bus 4648 * @port: CEC port to write the message on 4649 * @msg_len: length of msg in bytes 4650 * @msg: message content to write to the CEC bus 4651 */ 4652 struct ec_params_cec_write_v1 { 4653 uint8_t port; 4654 uint8_t msg_len; 4655 uint8_t msg[MAX_CEC_MSG_LEN]; 4656 } __ec_align1; 4657 4658 /* CEC message read from a CEC bus reported back to the AP */ 4659 #define EC_CMD_CEC_READ_MSG 0x00B9 4660 4661 /** 4662 * struct ec_params_cec_read - Read a message from the CEC bus 4663 * @port: CEC port to read a message on 4664 */ 4665 struct ec_params_cec_read { 4666 uint8_t port; 4667 } __ec_align1; 4668 4669 /** 4670 * struct ec_response_cec_read - Message read from the CEC bus 4671 * @msg_len: length of msg in bytes 4672 * @msg: message content read from the CEC bus 4673 */ 4674 struct ec_response_cec_read { 4675 uint8_t msg_len; 4676 uint8_t msg[MAX_CEC_MSG_LEN]; 4677 } __ec_align1; 4678 4679 /* Set various CEC parameters */ 4680 #define EC_CMD_CEC_SET 0x00BA 4681 4682 /** 4683 * struct ec_params_cec_set - CEC parameters set 4684 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4685 * @port: CEC port to set the parameter on 4686 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC 4687 * or 1 to enable CEC functionality, in case cmd is 4688 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical 4689 * address between 0 and 15 or 0xff to unregister 4690 */ 4691 struct ec_params_cec_set { 4692 uint8_t cmd : 4; /* enum cec_command */ 4693 uint8_t port : 4; 4694 uint8_t val; 4695 } __ec_align1; 4696 4697 /* Read various CEC parameters */ 4698 #define EC_CMD_CEC_GET 0x00BB 4699 4700 /** 4701 * struct ec_params_cec_get - CEC parameters get 4702 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4703 * @port: CEC port to get the parameter on 4704 */ 4705 struct ec_params_cec_get { 4706 uint8_t cmd : 4; /* enum cec_command */ 4707 uint8_t port : 4; 4708 } __ec_align1; 4709 4710 /** 4711 * struct ec_response_cec_get - CEC parameters get response 4712 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is 4713 * disabled or 1 if CEC functionality is enabled, 4714 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the 4715 * configured logical address between 0 and 15 or 0xff if unregistered 4716 */ 4717 struct ec_response_cec_get { 4718 uint8_t val; 4719 } __ec_align1; 4720 4721 /* Get the number of CEC ports */ 4722 #define EC_CMD_CEC_PORT_COUNT 0x00C1 4723 4724 /** 4725 * struct ec_response_cec_port_count - CEC port count response 4726 * @port_count: number of CEC ports 4727 */ 4728 struct ec_response_cec_port_count { 4729 uint8_t port_count; 4730 } __ec_align1; 4731 4732 /* CEC parameters command */ 4733 enum cec_command { 4734 /* CEC reading, writing and events enable */ 4735 CEC_CMD_ENABLE, 4736 /* CEC logical address */ 4737 CEC_CMD_LOGICAL_ADDRESS, 4738 }; 4739 4740 /* Events from CEC to AP */ 4741 enum mkbp_cec_event { 4742 /* Outgoing message was acknowledged by a follower */ 4743 EC_MKBP_CEC_SEND_OK = BIT(0), 4744 /* Outgoing message was not acknowledged */ 4745 EC_MKBP_CEC_SEND_FAILED = BIT(1), 4746 /* Incoming message can be read out by AP */ 4747 EC_MKBP_CEC_HAVE_DATA = BIT(2), 4748 }; 4749 4750 /*****************************************************************************/ 4751 4752 /* Commands for audio codec. */ 4753 #define EC_CMD_EC_CODEC 0x00BC 4754 4755 enum ec_codec_subcmd { 4756 EC_CODEC_GET_CAPABILITIES = 0x0, 4757 EC_CODEC_GET_SHM_ADDR = 0x1, 4758 EC_CODEC_SET_SHM_ADDR = 0x2, 4759 EC_CODEC_SUBCMD_COUNT, 4760 }; 4761 4762 enum ec_codec_cap { 4763 EC_CODEC_CAP_WOV_AUDIO_SHM = 0, 4764 EC_CODEC_CAP_WOV_LANG_SHM = 1, 4765 EC_CODEC_CAP_LAST = 32, 4766 }; 4767 4768 enum ec_codec_shm_id { 4769 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0, 4770 EC_CODEC_SHM_ID_WOV_LANG = 0x1, 4771 EC_CODEC_SHM_ID_LAST, 4772 }; 4773 4774 enum ec_codec_shm_type { 4775 EC_CODEC_SHM_TYPE_EC_RAM = 0x0, 4776 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1, 4777 }; 4778 4779 struct __ec_align1 ec_param_ec_codec_get_shm_addr { 4780 uint8_t shm_id; 4781 uint8_t reserved[3]; 4782 }; 4783 4784 struct __ec_align4 ec_param_ec_codec_set_shm_addr { 4785 uint64_t phys_addr; 4786 uint32_t len; 4787 uint8_t shm_id; 4788 uint8_t reserved[3]; 4789 }; 4790 4791 struct __ec_align4 ec_param_ec_codec { 4792 uint8_t cmd; /* enum ec_codec_subcmd */ 4793 uint8_t reserved[3]; 4794 4795 union { 4796 struct ec_param_ec_codec_get_shm_addr 4797 get_shm_addr_param; 4798 struct ec_param_ec_codec_set_shm_addr 4799 set_shm_addr_param; 4800 }; 4801 }; 4802 4803 struct __ec_align4 ec_response_ec_codec_get_capabilities { 4804 uint32_t capabilities; 4805 }; 4806 4807 struct __ec_align4 ec_response_ec_codec_get_shm_addr { 4808 uint64_t phys_addr; 4809 uint32_t len; 4810 uint8_t type; 4811 uint8_t reserved[3]; 4812 }; 4813 4814 /*****************************************************************************/ 4815 4816 /* Commands for DMIC on audio codec. */ 4817 #define EC_CMD_EC_CODEC_DMIC 0x00BD 4818 4819 enum ec_codec_dmic_subcmd { 4820 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0, 4821 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1, 4822 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2, 4823 EC_CODEC_DMIC_SUBCMD_COUNT, 4824 }; 4825 4826 enum ec_codec_dmic_channel { 4827 EC_CODEC_DMIC_CHANNEL_0 = 0x0, 4828 EC_CODEC_DMIC_CHANNEL_1 = 0x1, 4829 EC_CODEC_DMIC_CHANNEL_2 = 0x2, 4830 EC_CODEC_DMIC_CHANNEL_3 = 0x3, 4831 EC_CODEC_DMIC_CHANNEL_4 = 0x4, 4832 EC_CODEC_DMIC_CHANNEL_5 = 0x5, 4833 EC_CODEC_DMIC_CHANNEL_6 = 0x6, 4834 EC_CODEC_DMIC_CHANNEL_7 = 0x7, 4835 EC_CODEC_DMIC_CHANNEL_COUNT, 4836 }; 4837 4838 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx { 4839 uint8_t channel; /* enum ec_codec_dmic_channel */ 4840 uint8_t gain; 4841 uint8_t reserved[2]; 4842 }; 4843 4844 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx { 4845 uint8_t channel; /* enum ec_codec_dmic_channel */ 4846 uint8_t reserved[3]; 4847 }; 4848 4849 struct __ec_align4 ec_param_ec_codec_dmic { 4850 uint8_t cmd; /* enum ec_codec_dmic_subcmd */ 4851 uint8_t reserved[3]; 4852 4853 union { 4854 struct ec_param_ec_codec_dmic_set_gain_idx 4855 set_gain_idx_param; 4856 struct ec_param_ec_codec_dmic_get_gain_idx 4857 get_gain_idx_param; 4858 }; 4859 }; 4860 4861 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain { 4862 uint8_t max_gain; 4863 }; 4864 4865 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx { 4866 uint8_t gain; 4867 }; 4868 4869 /*****************************************************************************/ 4870 4871 /* Commands for I2S RX on audio codec. */ 4872 4873 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE 4874 4875 enum ec_codec_i2s_rx_subcmd { 4876 EC_CODEC_I2S_RX_ENABLE = 0x0, 4877 EC_CODEC_I2S_RX_DISABLE = 0x1, 4878 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2, 4879 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3, 4880 EC_CODEC_I2S_RX_SET_BCLK = 0x4, 4881 EC_CODEC_I2S_RX_RESET = 0x5, 4882 EC_CODEC_I2S_RX_SUBCMD_COUNT, 4883 }; 4884 4885 enum ec_codec_i2s_rx_sample_depth { 4886 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0, 4887 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1, 4888 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT, 4889 }; 4890 4891 enum ec_codec_i2s_rx_daifmt { 4892 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0, 4893 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1, 4894 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2, 4895 EC_CODEC_I2S_RX_DAIFMT_COUNT, 4896 }; 4897 4898 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth { 4899 uint8_t depth; 4900 uint8_t reserved[3]; 4901 }; 4902 4903 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain { 4904 uint8_t left; 4905 uint8_t right; 4906 uint8_t reserved[2]; 4907 }; 4908 4909 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt { 4910 uint8_t daifmt; 4911 uint8_t reserved[3]; 4912 }; 4913 4914 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk { 4915 uint32_t bclk; 4916 }; 4917 4918 struct __ec_align4 ec_param_ec_codec_i2s_rx { 4919 uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */ 4920 uint8_t reserved[3]; 4921 4922 union { 4923 struct ec_param_ec_codec_i2s_rx_set_sample_depth 4924 set_sample_depth_param; 4925 struct ec_param_ec_codec_i2s_rx_set_daifmt 4926 set_daifmt_param; 4927 struct ec_param_ec_codec_i2s_rx_set_bclk 4928 set_bclk_param; 4929 }; 4930 }; 4931 4932 /*****************************************************************************/ 4933 /* Commands for WoV on audio codec. */ 4934 4935 #define EC_CMD_EC_CODEC_WOV 0x00BF 4936 4937 enum ec_codec_wov_subcmd { 4938 EC_CODEC_WOV_SET_LANG = 0x0, 4939 EC_CODEC_WOV_SET_LANG_SHM = 0x1, 4940 EC_CODEC_WOV_GET_LANG = 0x2, 4941 EC_CODEC_WOV_ENABLE = 0x3, 4942 EC_CODEC_WOV_DISABLE = 0x4, 4943 EC_CODEC_WOV_READ_AUDIO = 0x5, 4944 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6, 4945 EC_CODEC_WOV_SUBCMD_COUNT, 4946 }; 4947 4948 /* 4949 * @hash is SHA256 of the whole language model. 4950 * @total_len indicates the length of whole language model. 4951 * @offset is the cursor from the beginning of the model. 4952 * @buf is the packet buffer. 4953 * @len denotes how many bytes in the buf. 4954 */ 4955 struct __ec_align4 ec_param_ec_codec_wov_set_lang { 4956 uint8_t hash[32]; 4957 uint32_t total_len; 4958 uint32_t offset; 4959 uint8_t buf[128]; 4960 uint32_t len; 4961 }; 4962 4963 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm { 4964 uint8_t hash[32]; 4965 uint32_t total_len; 4966 }; 4967 4968 struct __ec_align4 ec_param_ec_codec_wov { 4969 uint8_t cmd; /* enum ec_codec_wov_subcmd */ 4970 uint8_t reserved[3]; 4971 4972 union { 4973 struct ec_param_ec_codec_wov_set_lang 4974 set_lang_param; 4975 struct ec_param_ec_codec_wov_set_lang_shm 4976 set_lang_shm_param; 4977 }; 4978 }; 4979 4980 struct __ec_align4 ec_response_ec_codec_wov_get_lang { 4981 uint8_t hash[32]; 4982 }; 4983 4984 struct __ec_align4 ec_response_ec_codec_wov_read_audio { 4985 uint8_t buf[128]; 4986 uint32_t len; 4987 }; 4988 4989 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm { 4990 uint32_t offset; 4991 uint32_t len; 4992 }; 4993 4994 /*****************************************************************************/ 4995 /* System commands */ 4996 4997 /* 4998 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 4999 * necessarily reboot the EC. Rename to "image" or something similar? 5000 */ 5001 #define EC_CMD_REBOOT_EC 0x00D2 5002 5003 /* Command */ 5004 enum ec_reboot_cmd { 5005 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 5006 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 5007 EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ 5008 /* (command 3 was jump to RW-B) */ 5009 EC_REBOOT_COLD = 4, /* Cold-reboot */ 5010 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 5011 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 5012 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 5013 EC_REBOOT_COLD_AP_OFF = 8, /* Cold-reboot and don't boot AP */ 5014 }; 5015 5016 /* Flags for ec_params_reboot_ec.reboot_flags */ 5017 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ 5018 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ 5019 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ 5020 5021 struct ec_params_reboot_ec { 5022 uint8_t cmd; /* enum ec_reboot_cmd */ 5023 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 5024 } __ec_align1; 5025 5026 /* 5027 * Get information on last EC panic. 5028 * 5029 * Returns variable-length platform-dependent panic information. See panic.h 5030 * for details. 5031 */ 5032 #define EC_CMD_GET_PANIC_INFO 0x00D3 5033 5034 /*****************************************************************************/ 5035 /* 5036 * Special commands 5037 * 5038 * These do not follow the normal rules for commands. See each command for 5039 * details. 5040 */ 5041 5042 /* 5043 * Reboot NOW 5044 * 5045 * This command will work even when the EC LPC interface is busy, because the 5046 * reboot command is processed at interrupt level. Note that when the EC 5047 * reboots, the host will reboot too, so there is no response to this command. 5048 * 5049 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 5050 */ 5051 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 5052 5053 /* 5054 * Resend last response (not supported on LPC). 5055 * 5056 * Returns EC_RES_UNAVAILABLE if there is no response available - for example, 5057 * there was no previous command, or the previous command's response was too 5058 * big to save. 5059 */ 5060 #define EC_CMD_RESEND_RESPONSE 0x00DB 5061 5062 /* 5063 * This header byte on a command indicate version 0. Any header byte less 5064 * than this means that we are talking to an old EC which doesn't support 5065 * versioning. In that case, we assume version 0. 5066 * 5067 * Header bytes greater than this indicate a later version. For example, 5068 * EC_CMD_VERSION0 + 1 means we are using version 1. 5069 * 5070 * The old EC interface must not use commands 0xdc or higher. 5071 */ 5072 #define EC_CMD_VERSION0 0x00DC 5073 5074 /*****************************************************************************/ 5075 /* 5076 * PD commands 5077 * 5078 * These commands are for PD MCU communication. 5079 */ 5080 5081 /* EC to PD MCU exchange status command */ 5082 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 5083 #define EC_VER_PD_EXCHANGE_STATUS 2 5084 5085 enum pd_charge_state { 5086 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 5087 PD_CHARGE_NONE, /* No charging allowed */ 5088 PD_CHARGE_5V, /* 5V charging only */ 5089 PD_CHARGE_MAX /* Charge at max voltage */ 5090 }; 5091 5092 /* Status of EC being sent to PD */ 5093 #define EC_STATUS_HIBERNATING BIT(0) 5094 5095 struct ec_params_pd_status { 5096 uint8_t status; /* EC status */ 5097 int8_t batt_soc; /* battery state of charge */ 5098 uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 5099 } __ec_align1; 5100 5101 /* Status of PD being sent back to EC */ 5102 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ 5103 #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ 5104 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ 5105 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ 5106 #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ 5107 #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ 5108 #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ 5109 #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 5110 PD_STATUS_TCPC_ALERT_1 | \ 5111 PD_STATUS_HOST_EVENT) 5112 struct ec_response_pd_status { 5113 uint32_t curr_lim_ma; /* input current limit */ 5114 uint16_t status; /* PD MCU status */ 5115 int8_t active_charge_port; /* active charging port */ 5116 } __ec_align_size1; 5117 5118 /* AP to PD MCU host event status command, cleared on read */ 5119 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 5120 5121 /* PD MCU host event status bits */ 5122 #define PD_EVENT_UPDATE_DEVICE BIT(0) 5123 #define PD_EVENT_POWER_CHANGE BIT(1) 5124 #define PD_EVENT_IDENTITY_RECEIVED BIT(2) 5125 #define PD_EVENT_DATA_SWAP BIT(3) 5126 #define PD_EVENT_TYPEC BIT(4) 5127 #define PD_EVENT_PPM BIT(5) 5128 #define PD_EVENT_INIT BIT(6) 5129 5130 struct ec_response_host_event_status { 5131 uint32_t status; /* PD MCU host event status */ 5132 } __ec_align4; 5133 5134 /* Set USB type-C port role and muxes */ 5135 #define EC_CMD_USB_PD_CONTROL 0x0101 5136 5137 enum usb_pd_control_role { 5138 USB_PD_CTRL_ROLE_NO_CHANGE = 0, 5139 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */ 5140 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 5141 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 5142 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 5143 USB_PD_CTRL_ROLE_FREEZE = 5, 5144 USB_PD_CTRL_ROLE_COUNT 5145 }; 5146 5147 enum usb_pd_control_mux { 5148 USB_PD_CTRL_MUX_NO_CHANGE = 0, 5149 USB_PD_CTRL_MUX_NONE = 1, 5150 USB_PD_CTRL_MUX_USB = 2, 5151 USB_PD_CTRL_MUX_DP = 3, 5152 USB_PD_CTRL_MUX_DOCK = 4, 5153 USB_PD_CTRL_MUX_AUTO = 5, 5154 USB_PD_CTRL_MUX_COUNT 5155 }; 5156 5157 enum usb_pd_control_swap { 5158 USB_PD_CTRL_SWAP_NONE = 0, 5159 USB_PD_CTRL_SWAP_DATA = 1, 5160 USB_PD_CTRL_SWAP_POWER = 2, 5161 USB_PD_CTRL_SWAP_VCONN = 3, 5162 USB_PD_CTRL_SWAP_COUNT 5163 }; 5164 5165 struct ec_params_usb_pd_control { 5166 uint8_t port; 5167 uint8_t role; 5168 uint8_t mux; 5169 uint8_t swap; 5170 } __ec_align1; 5171 5172 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ 5173 #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ 5174 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ 5175 5176 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ 5177 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ 5178 #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */ 5179 #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */ 5180 #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */ 5181 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ 5182 #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ 5183 5184 struct ec_response_usb_pd_control { 5185 uint8_t enabled; 5186 uint8_t role; 5187 uint8_t polarity; 5188 uint8_t state; 5189 } __ec_align1; 5190 5191 struct ec_response_usb_pd_control_v1 { 5192 uint8_t enabled; 5193 uint8_t role; 5194 uint8_t polarity; 5195 char state[32]; 5196 } __ec_align1; 5197 5198 /* Values representing usbc PD CC state */ 5199 #define USBC_PD_CC_NONE 0 /* No accessory connected */ 5200 #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ 5201 #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ 5202 #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ 5203 #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ 5204 #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ 5205 5206 /* Active/Passive Cable */ 5207 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0) 5208 /* Optical/Non-optical cable */ 5209 #define USB_PD_CTRL_OPTICAL_CABLE BIT(1) 5210 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */ 5211 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2) 5212 /* Active Link Uni-Direction */ 5213 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3) 5214 5215 struct ec_response_usb_pd_control_v2 { 5216 uint8_t enabled; 5217 uint8_t role; 5218 uint8_t polarity; 5219 char state[32]; 5220 uint8_t cc_state; /* enum pd_cc_states representing cc state */ 5221 uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ 5222 uint8_t reserved; /* Reserved for future use */ 5223 uint8_t control_flags; /* USB_PD_CTRL_*flags */ 5224 uint8_t cable_speed; /* TBT_SS_* cable speed */ 5225 uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */ 5226 } __ec_align1; 5227 5228 #define EC_CMD_USB_PD_PORTS 0x0102 5229 5230 /* Maximum number of PD ports on a device, num_ports will be <= this */ 5231 #define EC_USB_PD_MAX_PORTS 8 5232 5233 struct ec_response_usb_pd_ports { 5234 uint8_t num_ports; 5235 } __ec_align1; 5236 5237 #define EC_CMD_USB_PD_POWER_INFO 0x0103 5238 5239 #define PD_POWER_CHARGING_PORT 0xff 5240 struct ec_params_usb_pd_power_info { 5241 uint8_t port; 5242 } __ec_align1; 5243 5244 enum usb_chg_type { 5245 USB_CHG_TYPE_NONE, 5246 USB_CHG_TYPE_PD, 5247 USB_CHG_TYPE_C, 5248 USB_CHG_TYPE_PROPRIETARY, 5249 USB_CHG_TYPE_BC12_DCP, 5250 USB_CHG_TYPE_BC12_CDP, 5251 USB_CHG_TYPE_BC12_SDP, 5252 USB_CHG_TYPE_OTHER, 5253 USB_CHG_TYPE_VBUS, 5254 USB_CHG_TYPE_UNKNOWN, 5255 USB_CHG_TYPE_DEDICATED, 5256 }; 5257 enum usb_power_roles { 5258 USB_PD_PORT_POWER_DISCONNECTED, 5259 USB_PD_PORT_POWER_SOURCE, 5260 USB_PD_PORT_POWER_SINK, 5261 USB_PD_PORT_POWER_SINK_NOT_CHARGING, 5262 }; 5263 5264 struct usb_chg_measures { 5265 uint16_t voltage_max; 5266 uint16_t voltage_now; 5267 uint16_t current_max; 5268 uint16_t current_lim; 5269 } __ec_align2; 5270 5271 struct ec_response_usb_pd_power_info { 5272 uint8_t role; 5273 uint8_t type; 5274 uint8_t dualrole; 5275 uint8_t reserved1; 5276 struct usb_chg_measures meas; 5277 uint32_t max_power; 5278 } __ec_align4; 5279 5280 5281 /* 5282 * This command will return the number of USB PD charge port + the number 5283 * of dedicated port present. 5284 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports 5285 */ 5286 #define EC_CMD_CHARGE_PORT_COUNT 0x0105 5287 struct ec_response_charge_port_count { 5288 uint8_t port_count; 5289 } __ec_align1; 5290 5291 /* Write USB-PD device FW */ 5292 #define EC_CMD_USB_PD_FW_UPDATE 0x0110 5293 5294 enum usb_pd_fw_update_cmds { 5295 USB_PD_FW_REBOOT, 5296 USB_PD_FW_FLASH_ERASE, 5297 USB_PD_FW_FLASH_WRITE, 5298 USB_PD_FW_ERASE_SIG, 5299 }; 5300 5301 struct ec_params_usb_pd_fw_update { 5302 uint16_t dev_id; 5303 uint8_t cmd; 5304 uint8_t port; 5305 uint32_t size; /* Size to write in bytes */ 5306 /* Followed by data to write */ 5307 } __ec_align4; 5308 5309 /* Write USB-PD Accessory RW_HASH table entry */ 5310 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 5311 /* RW hash is first 20 bytes of SHA-256 of RW section */ 5312 #define PD_RW_HASH_SIZE 20 5313 struct ec_params_usb_pd_rw_hash_entry { 5314 uint16_t dev_id; 5315 uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 5316 uint8_t reserved; /* 5317 * For alignment of current_image 5318 * TODO(rspangler) but it's not aligned! 5319 * Should have been reserved[2]. 5320 */ 5321 uint32_t current_image; /* One of ec_current_image */ 5322 } __ec_align1; 5323 5324 /* Read USB-PD Accessory info */ 5325 #define EC_CMD_USB_PD_DEV_INFO 0x0112 5326 5327 struct ec_params_usb_pd_info_request { 5328 uint8_t port; 5329 } __ec_align1; 5330 5331 /* Read USB-PD Device discovery info */ 5332 #define EC_CMD_USB_PD_DISCOVERY 0x0113 5333 struct ec_params_usb_pd_discovery_entry { 5334 uint16_t vid; /* USB-IF VID */ 5335 uint16_t pid; /* USB-IF PID */ 5336 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 5337 } __ec_align_size1; 5338 5339 /* Override default charge behavior */ 5340 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 5341 5342 /* Negative port parameters have special meaning */ 5343 enum usb_pd_override_ports { 5344 OVERRIDE_DONT_CHARGE = -2, 5345 OVERRIDE_OFF = -1, 5346 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */ 5347 }; 5348 5349 struct ec_params_charge_port_override { 5350 int16_t override_port; /* Override port# */ 5351 } __ec_align2; 5352 5353 /* 5354 * Read (and delete) one entry of PD event log. 5355 * TODO(crbug.com/751742): Make this host command more generic to accommodate 5356 * future non-PD logs that use the same internal EC event_log. 5357 */ 5358 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 5359 5360 struct ec_response_pd_log { 5361 uint32_t timestamp; /* relative timestamp in milliseconds */ 5362 uint8_t type; /* event type : see PD_EVENT_xx below */ 5363 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 5364 uint16_t data; /* type-defined data payload */ 5365 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */ 5366 } __ec_align4; 5367 5368 /* The timestamp is the microsecond counter shifted to get about a ms. */ 5369 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ 5370 5371 #define PD_LOG_SIZE_MASK 0x1f 5372 #define PD_LOG_PORT_MASK 0xe0 5373 #define PD_LOG_PORT_SHIFT 5 5374 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \ 5375 ((size) & PD_LOG_SIZE_MASK)) 5376 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT) 5377 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK) 5378 5379 /* PD event log : entry types */ 5380 /* PD MCU events */ 5381 #define PD_EVENT_MCU_BASE 0x00 5382 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0) 5383 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1) 5384 /* Reserved for custom board event */ 5385 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2) 5386 /* PD generic accessory events */ 5387 #define PD_EVENT_ACC_BASE 0x20 5388 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0) 5389 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1) 5390 /* PD power supply events */ 5391 #define PD_EVENT_PS_BASE 0x40 5392 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0) 5393 /* PD video dongles events */ 5394 #define PD_EVENT_VIDEO_BASE 0x60 5395 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0) 5396 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1) 5397 /* Returned in the "type" field, when there is no entry available */ 5398 #define PD_EVENT_NO_ENTRY 0xff 5399 5400 /* 5401 * PD_EVENT_MCU_CHARGE event definition : 5402 * the payload is "struct usb_chg_measures" 5403 * the data field contains the port state flags as defined below : 5404 */ 5405 /* Port partner is a dual role device */ 5406 #define CHARGE_FLAGS_DUAL_ROLE BIT(15) 5407 /* Port is the pending override port */ 5408 #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14) 5409 /* Port is the override port */ 5410 #define CHARGE_FLAGS_OVERRIDE BIT(13) 5411 /* Charger type */ 5412 #define CHARGE_FLAGS_TYPE_SHIFT 3 5413 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT) 5414 /* Power delivery role */ 5415 #define CHARGE_FLAGS_ROLE_MASK (7 << 0) 5416 5417 /* 5418 * PD_EVENT_PS_FAULT data field flags definition : 5419 */ 5420 #define PS_FAULT_OCP 1 5421 #define PS_FAULT_FAST_OCP 2 5422 #define PS_FAULT_OVP 3 5423 #define PS_FAULT_DISCH 4 5424 5425 /* 5426 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info". 5427 */ 5428 struct mcdp_version { 5429 uint8_t major; 5430 uint8_t minor; 5431 uint16_t build; 5432 } __ec_align4; 5433 5434 struct mcdp_info { 5435 uint8_t family[2]; 5436 uint8_t chipid[2]; 5437 struct mcdp_version irom; 5438 struct mcdp_version fw; 5439 } __ec_align4; 5440 5441 /* struct mcdp_info field decoding */ 5442 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 5443 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 5444 5445 /* Get/Set USB-PD Alternate mode info */ 5446 #define EC_CMD_USB_PD_GET_AMODE 0x0116 5447 struct ec_params_usb_pd_get_mode_request { 5448 uint16_t svid_idx; /* SVID index to get */ 5449 uint8_t port; /* port */ 5450 } __ec_align_size1; 5451 5452 struct ec_params_usb_pd_get_mode_response { 5453 uint16_t svid; /* SVID */ 5454 uint16_t opos; /* Object Position */ 5455 uint32_t vdo[6]; /* Mode VDOs */ 5456 } __ec_align4; 5457 5458 #define EC_CMD_USB_PD_SET_AMODE 0x0117 5459 5460 enum pd_mode_cmd { 5461 PD_EXIT_MODE = 0, 5462 PD_ENTER_MODE = 1, 5463 /* Not a command. Do NOT remove. */ 5464 PD_MODE_CMD_COUNT, 5465 }; 5466 5467 struct ec_params_usb_pd_set_mode_request { 5468 uint32_t cmd; /* enum pd_mode_cmd */ 5469 uint16_t svid; /* SVID to set */ 5470 uint8_t opos; /* Object Position */ 5471 uint8_t port; /* port */ 5472 } __ec_align4; 5473 5474 /* Ask the PD MCU to record a log of a requested type */ 5475 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 5476 5477 struct ec_params_pd_write_log_entry { 5478 uint8_t type; /* event type : see PD_EVENT_xx above */ 5479 uint8_t port; /* port#, or 0 for events unrelated to a given port */ 5480 } __ec_align1; 5481 5482 5483 /* Control USB-PD chip */ 5484 #define EC_CMD_PD_CONTROL 0x0119 5485 5486 enum ec_pd_control_cmd { 5487 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 5488 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 5489 PD_RESET, /* Force reset the PD chip */ 5490 PD_CONTROL_DISABLE, /* Disable further calls to this command */ 5491 PD_CHIP_ON, /* Power on the PD chip */ 5492 }; 5493 5494 struct ec_params_pd_control { 5495 uint8_t chip; /* chip id */ 5496 uint8_t subcmd; 5497 } __ec_align1; 5498 5499 /* Get info about USB-C SS muxes */ 5500 #define EC_CMD_USB_PD_MUX_INFO 0x011A 5501 5502 struct ec_params_usb_pd_mux_info { 5503 uint8_t port; /* USB-C port number */ 5504 } __ec_align1; 5505 5506 /* Flags representing mux state */ 5507 #define USB_PD_MUX_NONE 0 /* Open switch */ 5508 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ 5509 #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ 5510 #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ 5511 #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ 5512 #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ 5513 #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */ 5514 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */ 5515 #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */ 5516 5517 struct ec_response_usb_pd_mux_info { 5518 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 5519 } __ec_align1; 5520 5521 #define EC_CMD_PD_CHIP_INFO 0x011B 5522 5523 struct ec_params_pd_chip_info { 5524 uint8_t port; /* USB-C port number */ 5525 uint8_t renew; /* Force renewal */ 5526 } __ec_align1; 5527 5528 struct ec_response_pd_chip_info { 5529 uint16_t vendor_id; 5530 uint16_t product_id; 5531 uint16_t device_id; 5532 union { 5533 uint8_t fw_version_string[8]; 5534 uint64_t fw_version_number; 5535 }; 5536 } __ec_align2; 5537 5538 struct ec_response_pd_chip_info_v1 { 5539 uint16_t vendor_id; 5540 uint16_t product_id; 5541 uint16_t device_id; 5542 union { 5543 uint8_t fw_version_string[8]; 5544 uint64_t fw_version_number; 5545 }; 5546 union { 5547 uint8_t min_req_fw_version_string[8]; 5548 uint64_t min_req_fw_version_number; 5549 }; 5550 } __ec_align2; 5551 5552 /* Run RW signature verification and get status */ 5553 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C 5554 5555 struct ec_response_rwsig_check_status { 5556 uint32_t status; 5557 } __ec_align4; 5558 5559 /* For controlling RWSIG task */ 5560 #define EC_CMD_RWSIG_ACTION 0x011D 5561 5562 enum rwsig_action { 5563 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 5564 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 5565 }; 5566 5567 struct ec_params_rwsig_action { 5568 uint32_t action; 5569 } __ec_align4; 5570 5571 /* Run verification on a slot */ 5572 #define EC_CMD_EFS_VERIFY 0x011E 5573 5574 struct ec_params_efs_verify { 5575 uint8_t region; /* enum ec_flash_region */ 5576 } __ec_align1; 5577 5578 /* 5579 * Retrieve info from Cros Board Info store. Response is based on the data 5580 * type. Integers return a uint32. Strings return a string, using the response 5581 * size to determine how big it is. 5582 */ 5583 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F 5584 /* 5585 * Write info into Cros Board Info on EEPROM. Write fails if the board has 5586 * hardware write-protect enabled. 5587 */ 5588 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 5589 5590 enum cbi_data_tag { 5591 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ 5592 CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ 5593 CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ 5594 CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ 5595 CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ 5596 CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ 5597 CBI_TAG_COUNT, 5598 }; 5599 5600 /* 5601 * Flags to control read operation 5602 * 5603 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 5604 * write was successful without reboot. 5605 */ 5606 #define CBI_GET_RELOAD BIT(0) 5607 5608 struct ec_params_get_cbi { 5609 uint32_t tag; /* enum cbi_data_tag */ 5610 uint32_t flag; /* CBI_GET_* */ 5611 } __ec_align4; 5612 5613 /* 5614 * Flags to control write behavior. 5615 * 5616 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 5617 * useful when writing multiple fields in a row. 5618 * INIT: Need to be set when creating a new CBI from scratch. All fields 5619 * will be initialized to zero first. 5620 */ 5621 #define CBI_SET_NO_SYNC BIT(0) 5622 #define CBI_SET_INIT BIT(1) 5623 5624 struct ec_params_set_cbi { 5625 uint32_t tag; /* enum cbi_data_tag */ 5626 uint32_t flag; /* CBI_SET_* */ 5627 uint32_t size; /* Data size */ 5628 uint8_t data[]; /* For string and raw data */ 5629 } __ec_align1; 5630 5631 /* 5632 * Information about resets of the AP by the EC and the EC's own uptime. 5633 */ 5634 #define EC_CMD_GET_UPTIME_INFO 0x0121 5635 5636 struct ec_response_uptime_info { 5637 /* 5638 * Number of milliseconds since the last EC boot. Sysjump resets 5639 * typically do not restart the EC's time_since_boot epoch. 5640 * 5641 * WARNING: The EC's sense of time is much less accurate than the AP's 5642 * sense of time, in both phase and frequency. This timebase is similar 5643 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. 5644 */ 5645 uint32_t time_since_ec_boot_ms; 5646 5647 /* 5648 * Number of times the AP was reset by the EC since the last EC boot. 5649 * Note that the AP may be held in reset by the EC during the initial 5650 * boot sequence, such that the very first AP boot may count as more 5651 * than one here. 5652 */ 5653 uint32_t ap_resets_since_ec_boot; 5654 5655 /* 5656 * The set of flags which describe the EC's most recent reset. See 5657 * include/system.h RESET_FLAG_* for details. 5658 */ 5659 uint32_t ec_reset_flags; 5660 5661 /* Empty log entries have both the cause and timestamp set to zero. */ 5662 struct ap_reset_log_entry { 5663 /* 5664 * See include/chipset.h: enum chipset_{reset,shutdown}_reason 5665 * for details. 5666 */ 5667 uint16_t reset_cause; 5668 5669 /* Reserved for protocol growth. */ 5670 uint16_t reserved; 5671 5672 /* 5673 * The time of the reset's assertion, in milliseconds since the 5674 * last EC boot, in the same epoch as time_since_ec_boot_ms. 5675 * Set to zero if the log entry is empty. 5676 */ 5677 uint32_t reset_time_ms; 5678 } recent_ap_reset[4]; 5679 } __ec_align4; 5680 5681 /* 5682 * Add entropy to the device secret (stored in the rollback region). 5683 * 5684 * Depending on the chip, the operation may take a long time (e.g. to erase 5685 * flash), so the commands are asynchronous. 5686 */ 5687 #define EC_CMD_ADD_ENTROPY 0x0122 5688 5689 enum add_entropy_action { 5690 /* Add entropy to the current secret. */ 5691 ADD_ENTROPY_ASYNC = 0, 5692 /* 5693 * Add entropy, and also make sure that the previous secret is erased. 5694 * (this can be implemented by adding entropy multiple times until 5695 * all rolback blocks have been overwritten). 5696 */ 5697 ADD_ENTROPY_RESET_ASYNC = 1, 5698 /* Read back result from the previous operation. */ 5699 ADD_ENTROPY_GET_RESULT = 2, 5700 }; 5701 5702 struct ec_params_rollback_add_entropy { 5703 uint8_t action; 5704 } __ec_align1; 5705 5706 /* 5707 * Perform a single read of a given ADC channel. 5708 */ 5709 #define EC_CMD_ADC_READ 0x0123 5710 5711 struct ec_params_adc_read { 5712 uint8_t adc_channel; 5713 } __ec_align1; 5714 5715 struct ec_response_adc_read { 5716 int32_t adc_value; 5717 } __ec_align4; 5718 5719 /* 5720 * Read back rollback info 5721 */ 5722 #define EC_CMD_ROLLBACK_INFO 0x0124 5723 5724 struct ec_response_rollback_info { 5725 int32_t id; /* Incrementing number to indicate which region to use. */ 5726 int32_t rollback_min_version; 5727 int32_t rw_rollback_version; 5728 } __ec_align4; 5729 5730 5731 /* Issue AP reset */ 5732 #define EC_CMD_AP_RESET 0x0125 5733 5734 /* 5735 * Get the number of peripheral charge ports 5736 */ 5737 #define EC_CMD_PCHG_COUNT 0x0134 5738 5739 #define EC_PCHG_MAX_PORTS 8 5740 5741 struct ec_response_pchg_count { 5742 uint8_t port_count; 5743 } __ec_align1; 5744 5745 /* 5746 * Get the status of a peripheral charge port 5747 */ 5748 #define EC_CMD_PCHG 0x0135 5749 5750 struct ec_params_pchg { 5751 uint8_t port; 5752 } __ec_align1; 5753 5754 struct ec_response_pchg { 5755 uint32_t error; /* enum pchg_error */ 5756 uint8_t state; /* enum pchg_state state */ 5757 uint8_t battery_percentage; 5758 uint8_t unused0; 5759 uint8_t unused1; 5760 /* Fields added in version 1 */ 5761 uint32_t fw_version; 5762 uint32_t dropped_event_count; 5763 } __ec_align2; 5764 5765 enum pchg_state { 5766 /* Charger is reset and not initialized. */ 5767 PCHG_STATE_RESET = 0, 5768 /* Charger is initialized or disabled. */ 5769 PCHG_STATE_INITIALIZED, 5770 /* Charger is enabled and ready to detect a device. */ 5771 PCHG_STATE_ENABLED, 5772 /* Device is in proximity. */ 5773 PCHG_STATE_DETECTED, 5774 /* Device is being charged. */ 5775 PCHG_STATE_CHARGING, 5776 /* Device is fully charged. It implies DETECTED (& not charging). */ 5777 PCHG_STATE_FULL, 5778 /* In download (a.k.a. firmware update) mode */ 5779 PCHG_STATE_DOWNLOAD, 5780 /* In download mode. Ready for receiving data. */ 5781 PCHG_STATE_DOWNLOADING, 5782 /* Device is ready for data communication. */ 5783 PCHG_STATE_CONNECTED, 5784 /* Put no more entry below */ 5785 PCHG_STATE_COUNT, 5786 }; 5787 5788 #define EC_PCHG_STATE_TEXT { \ 5789 [PCHG_STATE_RESET] = "RESET", \ 5790 [PCHG_STATE_INITIALIZED] = "INITIALIZED", \ 5791 [PCHG_STATE_ENABLED] = "ENABLED", \ 5792 [PCHG_STATE_DETECTED] = "DETECTED", \ 5793 [PCHG_STATE_CHARGING] = "CHARGING", \ 5794 [PCHG_STATE_FULL] = "FULL", \ 5795 [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \ 5796 [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \ 5797 [PCHG_STATE_CONNECTED] = "CONNECTED", \ 5798 } 5799 5800 /* 5801 * Update firmware of peripheral chip 5802 */ 5803 #define EC_CMD_PCHG_UPDATE 0x0136 5804 5805 /* Port number is encoded in bit[28:31]. */ 5806 #define EC_MKBP_PCHG_PORT_SHIFT 28 5807 /* Utility macro for converting MKBP event to port number. */ 5808 #define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf) 5809 /* Utility macro for extracting event bits. */ 5810 #define EC_MKBP_PCHG_EVENT_MASK(e) ((e) \ 5811 & GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0)) 5812 5813 #define EC_MKBP_PCHG_UPDATE_OPENED BIT(0) 5814 #define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1) 5815 #define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2) 5816 #define EC_MKBP_PCHG_UPDATE_ERROR BIT(3) 5817 #define EC_MKBP_PCHG_DEVICE_EVENT BIT(4) 5818 5819 enum ec_pchg_update_cmd { 5820 /* Reset chip to normal mode. */ 5821 EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL = 0, 5822 /* Reset and put a chip in update (a.k.a. download) mode. */ 5823 EC_PCHG_UPDATE_CMD_OPEN, 5824 /* Write a block of data containing FW image. */ 5825 EC_PCHG_UPDATE_CMD_WRITE, 5826 /* Close update session. */ 5827 EC_PCHG_UPDATE_CMD_CLOSE, 5828 /* End of commands */ 5829 EC_PCHG_UPDATE_CMD_COUNT, 5830 }; 5831 5832 struct ec_params_pchg_update { 5833 /* PCHG port number */ 5834 uint8_t port; 5835 /* enum ec_pchg_update_cmd */ 5836 uint8_t cmd; 5837 /* Padding */ 5838 uint8_t reserved0; 5839 uint8_t reserved1; 5840 /* Version of new firmware */ 5841 uint32_t version; 5842 /* CRC32 of new firmware */ 5843 uint32_t crc32; 5844 /* Address in chip memory where <data> is written to */ 5845 uint32_t addr; 5846 /* Size of <data> */ 5847 uint32_t size; 5848 /* Partial data of new firmware */ 5849 uint8_t data[]; 5850 } __ec_align4; 5851 5852 BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT 5853 < BIT(sizeof(((struct ec_params_pchg_update *)0)->cmd)*8)); 5854 5855 struct ec_response_pchg_update { 5856 /* Block size */ 5857 uint32_t block_size; 5858 } __ec_align4; 5859 5860 5861 /*****************************************************************************/ 5862 /* Voltage regulator controls */ 5863 5864 /* 5865 * Get basic info of voltage regulator for given index. 5866 * 5867 * Returns the regulator name and supported voltage list in mV. 5868 */ 5869 #define EC_CMD_REGULATOR_GET_INFO 0x012C 5870 5871 /* Maximum length of regulator name */ 5872 #define EC_REGULATOR_NAME_MAX_LEN 16 5873 5874 /* Maximum length of the supported voltage list. */ 5875 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16 5876 5877 struct ec_params_regulator_get_info { 5878 uint32_t index; 5879 } __ec_align4; 5880 5881 struct ec_response_regulator_get_info { 5882 char name[EC_REGULATOR_NAME_MAX_LEN]; 5883 uint16_t num_voltages; 5884 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT]; 5885 } __ec_align2; 5886 5887 /* 5888 * Configure the regulator as enabled / disabled. 5889 */ 5890 #define EC_CMD_REGULATOR_ENABLE 0x012D 5891 5892 struct ec_params_regulator_enable { 5893 uint32_t index; 5894 uint8_t enable; 5895 } __ec_align4; 5896 5897 /* 5898 * Query if the regulator is enabled. 5899 * 5900 * Returns 1 if the regulator is enabled, 0 if not. 5901 */ 5902 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E 5903 5904 struct ec_params_regulator_is_enabled { 5905 uint32_t index; 5906 } __ec_align4; 5907 5908 struct ec_response_regulator_is_enabled { 5909 uint8_t enabled; 5910 } __ec_align1; 5911 5912 /* 5913 * Set voltage for the voltage regulator within the range specified. 5914 * 5915 * The driver should select the voltage in range closest to min_mv. 5916 * 5917 * Also note that this might be called before the regulator is enabled, and the 5918 * setting should be in effect after the regulator is enabled. 5919 */ 5920 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F 5921 5922 struct ec_params_regulator_set_voltage { 5923 uint32_t index; 5924 uint32_t min_mv; 5925 uint32_t max_mv; 5926 } __ec_align4; 5927 5928 /* 5929 * Get the currently configured voltage for the voltage regulator. 5930 * 5931 * Note that this might be called before the regulator is enabled, and this 5932 * should return the configured output voltage if the regulator is enabled. 5933 */ 5934 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130 5935 5936 struct ec_params_regulator_get_voltage { 5937 uint32_t index; 5938 } __ec_align4; 5939 5940 struct ec_response_regulator_get_voltage { 5941 uint32_t voltage_mv; 5942 } __ec_align4; 5943 5944 /* 5945 * Gather all discovery information for the given port and partner type. 5946 * 5947 * Note that if discovery has not yet completed, only the currently completed 5948 * responses will be filled in. If the discovery data structures are changed 5949 * in the process of the command running, BUSY will be returned. 5950 * 5951 * VDO field sizes are set to the maximum possible number of VDOs a VDM may 5952 * contain, while the number of SVIDs here is selected to fit within the PROTO2 5953 * maximum parameter size. 5954 */ 5955 #define EC_CMD_TYPEC_DISCOVERY 0x0131 5956 5957 enum typec_partner_type { 5958 TYPEC_PARTNER_SOP = 0, 5959 TYPEC_PARTNER_SOP_PRIME = 1, 5960 }; 5961 5962 struct ec_params_typec_discovery { 5963 uint8_t port; 5964 uint8_t partner_type; /* enum typec_partner_type */ 5965 } __ec_align1; 5966 5967 struct svid_mode_info { 5968 uint16_t svid; 5969 uint16_t mode_count; /* Number of modes partner sent */ 5970 uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5971 }; 5972 5973 struct ec_response_typec_discovery { 5974 uint8_t identity_count; /* Number of identity VDOs partner sent */ 5975 uint8_t svid_count; /* Number of SVIDs partner sent */ 5976 uint16_t reserved; 5977 uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */ 5978 struct svid_mode_info svids[]; 5979 } __ec_align1; 5980 5981 /* USB Type-C commands for AP-controlled device policy. */ 5982 #define EC_CMD_TYPEC_CONTROL 0x0132 5983 5984 enum typec_control_command { 5985 TYPEC_CONTROL_COMMAND_EXIT_MODES, 5986 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, 5987 TYPEC_CONTROL_COMMAND_ENTER_MODE, 5988 TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY, 5989 TYPEC_CONTROL_COMMAND_USB_MUX_SET, 5990 TYPEC_CONTROL_COMMAND_BIST_SHARE_MODE, 5991 TYPEC_CONTROL_COMMAND_SEND_VDM_REQ, 5992 }; 5993 5994 /* Replies the AP may specify to the TBT EnterMode command as a UFP */ 5995 enum typec_tbt_ufp_reply { 5996 TYPEC_TBT_UFP_REPLY_NAK, 5997 TYPEC_TBT_UFP_REPLY_ACK, 5998 }; 5999 6000 struct typec_usb_mux_set { 6001 uint8_t mux_index; /* Index of the mux to set in the chain */ 6002 uint8_t mux_flags; /* USB_PD_MUX_*-encoded USB mux state to set */ 6003 } __ec_align1; 6004 6005 #define VDO_MAX_SIZE 7 6006 6007 struct typec_vdm_req { 6008 /* VDM data, including VDM header */ 6009 uint32_t vdm_data[VDO_MAX_SIZE]; 6010 /* Number of 32-bit fields filled in */ 6011 uint8_t vdm_data_objects; 6012 /* Partner to address - see enum typec_partner_type */ 6013 uint8_t partner_type; 6014 } __ec_align1; 6015 6016 struct ec_params_typec_control { 6017 uint8_t port; 6018 uint8_t command; /* enum typec_control_command */ 6019 uint16_t reserved; 6020 6021 /* 6022 * This section will be interpreted based on |command|. Define a 6023 * placeholder structure to avoid having to increase the size and bump 6024 * the command version when adding new sub-commands. 6025 */ 6026 union { 6027 uint32_t clear_events_mask; 6028 uint8_t mode_to_enter; /* enum typec_mode */ 6029 uint8_t tbt_ufp_reply; /* enum typec_tbt_ufp_reply */ 6030 struct typec_usb_mux_set mux_params; 6031 /* Used for VMD_REQ */ 6032 struct typec_vdm_req vdm_req_params; 6033 uint8_t placeholder[128]; 6034 }; 6035 } __ec_align1; 6036 6037 /* 6038 * Gather all status information for a port. 6039 * 6040 * Note: this covers many of the return fields from the deprecated 6041 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the 6042 * discovery data. The "enum pd_cc_states" is defined with the deprecated 6043 * EC_CMD_USB_PD_CONTROL command. 6044 * 6045 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags. 6046 */ 6047 #define EC_CMD_TYPEC_STATUS 0x0133 6048 6049 /* 6050 * Power role. 6051 * 6052 * Note this is also used for PD header creation, and values align to those in 6053 * the Power Delivery Specification Revision 3.0 (See 6054 * 6.2.1.1.4 Port Power Role). 6055 */ 6056 enum pd_power_role { 6057 PD_ROLE_SINK = 0, 6058 PD_ROLE_SOURCE = 1 6059 }; 6060 6061 /* 6062 * Data role. 6063 * 6064 * Note this is also used for PD header creation, and the first two values 6065 * align to those in the Power Delivery Specification Revision 3.0 (See 6066 * 6.2.1.1.6 Port Data Role). 6067 */ 6068 enum pd_data_role { 6069 PD_ROLE_UFP = 0, 6070 PD_ROLE_DFP = 1, 6071 PD_ROLE_DISCONNECTED = 2, 6072 }; 6073 6074 enum pd_vconn_role { 6075 PD_ROLE_VCONN_OFF = 0, 6076 PD_ROLE_VCONN_SRC = 1, 6077 }; 6078 6079 /* 6080 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2, 6081 * regardless of whether a debug accessory is connected. 6082 */ 6083 enum tcpc_cc_polarity { 6084 /* 6085 * _CCx: is used to indicate the polarity while not connected to 6086 * a Debug Accessory. Only one CC line will assert a resistor and 6087 * the other will be open. 6088 */ 6089 POLARITY_CC1 = 0, 6090 POLARITY_CC2 = 1, 6091 6092 /* 6093 * _CCx_DTS is used to indicate the polarity while connected to a 6094 * SRC Debug Accessory. Assert resistors on both lines. 6095 */ 6096 POLARITY_CC1_DTS = 2, 6097 POLARITY_CC2_DTS = 3, 6098 6099 /* 6100 * The current TCPC code relies on these specific POLARITY values. 6101 * Adding in a check to verify if the list grows for any reason 6102 * that this will give a hint that other places need to be 6103 * adjusted. 6104 */ 6105 POLARITY_COUNT 6106 }; 6107 6108 #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) 6109 #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) 6110 #define PD_STATUS_EVENT_HARD_RESET BIT(2) 6111 #define PD_STATUS_EVENT_DISCONNECTED BIT(3) 6112 #define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4) 6113 #define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5) 6114 #define PD_STATUS_EVENT_VDM_REQ_REPLY BIT(6) 6115 #define PD_STATUS_EVENT_VDM_REQ_FAILED BIT(7) 6116 #define PD_STATUS_EVENT_VDM_ATTENTION BIT(8) 6117 6118 struct ec_params_typec_status { 6119 uint8_t port; 6120 } __ec_align1; 6121 6122 struct ec_response_typec_status { 6123 uint8_t pd_enabled; /* PD communication enabled - bool */ 6124 uint8_t dev_connected; /* Device connected - bool */ 6125 uint8_t sop_connected; /* Device is SOP PD capable - bool */ 6126 uint8_t source_cap_count; /* Number of Source Cap PDOs */ 6127 6128 uint8_t power_role; /* enum pd_power_role */ 6129 uint8_t data_role; /* enum pd_data_role */ 6130 uint8_t vconn_role; /* enum pd_vconn_role */ 6131 uint8_t sink_cap_count; /* Number of Sink Cap PDOs */ 6132 6133 uint8_t polarity; /* enum tcpc_cc_polarity */ 6134 uint8_t cc_state; /* enum pd_cc_states */ 6135 uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */ 6136 uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */ 6137 6138 char tc_state[32]; /* TC state name */ 6139 6140 uint32_t events; /* PD_STATUS_EVENT bitmask */ 6141 6142 /* 6143 * BCD PD revisions for partners 6144 * 6145 * The format has the PD major reversion in the upper nibble, and PD 6146 * minor version in the next nibble. Following two nibbles are 6147 * currently 0. 6148 * ex. PD 3.2 would map to 0x3200 6149 * 6150 * PD major/minor will be 0 if no PD device is connected. 6151 */ 6152 uint16_t sop_revision; 6153 uint16_t sop_prime_revision; 6154 6155 uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */ 6156 6157 uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */ 6158 } __ec_align1; 6159 6160 /* 6161 * Gather the response to the most recent VDM REQ from the AP, as well 6162 * as popping the oldest VDM:Attention from the DPM queue 6163 */ 6164 #define EC_CMD_TYPEC_VDM_RESPONSE 0x013C 6165 6166 struct ec_params_typec_vdm_response { 6167 uint8_t port; 6168 } __ec_align1; 6169 6170 struct ec_response_typec_vdm_response { 6171 /* Number of 32-bit fields filled in */ 6172 uint8_t vdm_data_objects; 6173 /* Partner to address - see enum typec_partner_type */ 6174 uint8_t partner_type; 6175 /* enum ec_status describing VDM response */ 6176 uint16_t vdm_response_err; 6177 /* VDM data, including VDM header */ 6178 uint32_t vdm_response[VDO_MAX_SIZE]; 6179 /* Number of 32-bit Attention fields filled in */ 6180 uint8_t vdm_attention_objects; 6181 /* Number of remaining messages to consume */ 6182 uint8_t vdm_attention_left; 6183 /* Reserved */ 6184 uint16_t reserved1; 6185 /* VDM:Attention contents */ 6186 uint32_t vdm_attention[2]; 6187 } __ec_align1; 6188 6189 #undef VDO_MAX_SIZE 6190 6191 /* 6192 * UCSI OPM-PPM commands 6193 * 6194 * These commands are used for communication between OPM and PPM. 6195 * Only UCSI3.0 is tested. 6196 */ 6197 6198 #define EC_CMD_UCSI_PPM_SET 0x0140 6199 6200 /* The data size is stored in the host command protocol header. */ 6201 struct ec_params_ucsi_ppm_set { 6202 uint16_t offset; 6203 uint8_t data[]; 6204 } __ec_align2; 6205 6206 #define EC_CMD_UCSI_PPM_GET 0x0141 6207 6208 /* For 'GET' sub-commands, data will be returned as a raw payload. */ 6209 struct ec_params_ucsi_ppm_get { 6210 uint16_t offset; 6211 uint8_t size; 6212 } __ec_align2; 6213 6214 /*****************************************************************************/ 6215 /* The command range 0x200-0x2FF is reserved for Rotor. */ 6216 6217 /*****************************************************************************/ 6218 /* 6219 * Reserve a range of host commands for the CR51 firmware. 6220 */ 6221 #define EC_CMD_CR51_BASE 0x0300 6222 #define EC_CMD_CR51_LAST 0x03FF 6223 6224 /*****************************************************************************/ 6225 /* Fingerprint MCU commands: range 0x0400-0x040x */ 6226 6227 /* Fingerprint SPI sensor passthru command: prototyping ONLY */ 6228 #define EC_CMD_FP_PASSTHRU 0x0400 6229 6230 #define EC_FP_FLAG_NOT_COMPLETE 0x1 6231 6232 struct ec_params_fp_passthru { 6233 uint16_t len; /* Number of bytes to write then read */ 6234 uint16_t flags; /* EC_FP_FLAG_xxx */ 6235 uint8_t data[]; /* Data to send */ 6236 } __ec_align2; 6237 6238 /* Configure the Fingerprint MCU behavior */ 6239 #define EC_CMD_FP_MODE 0x0402 6240 6241 /* Put the sensor in its lowest power mode */ 6242 #define FP_MODE_DEEPSLEEP BIT(0) 6243 /* Wait to see a finger on the sensor */ 6244 #define FP_MODE_FINGER_DOWN BIT(1) 6245 /* Poll until the finger has left the sensor */ 6246 #define FP_MODE_FINGER_UP BIT(2) 6247 /* Capture the current finger image */ 6248 #define FP_MODE_CAPTURE BIT(3) 6249 /* Finger enrollment session on-going */ 6250 #define FP_MODE_ENROLL_SESSION BIT(4) 6251 /* Enroll the current finger image */ 6252 #define FP_MODE_ENROLL_IMAGE BIT(5) 6253 /* Try to match the current finger image */ 6254 #define FP_MODE_MATCH BIT(6) 6255 /* Reset and re-initialize the sensor. */ 6256 #define FP_MODE_RESET_SENSOR BIT(7) 6257 /* special value: don't change anything just read back current mode */ 6258 #define FP_MODE_DONT_CHANGE BIT(31) 6259 6260 #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ 6261 FP_MODE_FINGER_DOWN | \ 6262 FP_MODE_FINGER_UP | \ 6263 FP_MODE_CAPTURE | \ 6264 FP_MODE_ENROLL_SESSION | \ 6265 FP_MODE_ENROLL_IMAGE | \ 6266 FP_MODE_MATCH | \ 6267 FP_MODE_RESET_SENSOR | \ 6268 FP_MODE_DONT_CHANGE) 6269 6270 /* Capture types defined in bits [30..28] */ 6271 #define FP_MODE_CAPTURE_TYPE_SHIFT 28 6272 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) 6273 /* 6274 * This enum must remain ordered, if you add new values you must ensure that 6275 * FP_CAPTURE_TYPE_MAX is still the last one. 6276 */ 6277 enum fp_capture_type { 6278 /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ 6279 FP_CAPTURE_VENDOR_FORMAT = 0, 6280 /* Simple raw image capture (produces width x height x bpp bits) */ 6281 FP_CAPTURE_SIMPLE_IMAGE = 1, 6282 /* Self test pattern (e.g. checkerboard) */ 6283 FP_CAPTURE_PATTERN0 = 2, 6284 /* Self test pattern (e.g. inverted checkerboard) */ 6285 FP_CAPTURE_PATTERN1 = 3, 6286 /* Capture for Quality test with fixed contrast */ 6287 FP_CAPTURE_QUALITY_TEST = 4, 6288 /* Capture for pixel reset value test */ 6289 FP_CAPTURE_RESET_TEST = 5, 6290 FP_CAPTURE_TYPE_MAX, 6291 }; 6292 /* Extracts the capture type from the sensor 'mode' word */ 6293 #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ 6294 >> FP_MODE_CAPTURE_TYPE_SHIFT) 6295 6296 struct ec_params_fp_mode { 6297 uint32_t mode; /* as defined by FP_MODE_ constants */ 6298 } __ec_align4; 6299 6300 struct ec_response_fp_mode { 6301 uint32_t mode; /* as defined by FP_MODE_ constants */ 6302 } __ec_align4; 6303 6304 /* Retrieve Fingerprint sensor information */ 6305 #define EC_CMD_FP_INFO 0x0403 6306 6307 /* Number of dead pixels detected on the last maintenance */ 6308 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) 6309 /* Unknown number of dead pixels detected on the last maintenance */ 6310 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) 6311 /* No interrupt from the sensor */ 6312 #define FP_ERROR_NO_IRQ BIT(12) 6313 /* SPI communication error */ 6314 #define FP_ERROR_SPI_COMM BIT(13) 6315 /* Invalid sensor Hardware ID */ 6316 #define FP_ERROR_BAD_HWID BIT(14) 6317 /* Sensor initialization failed */ 6318 #define FP_ERROR_INIT_FAIL BIT(15) 6319 6320 struct ec_response_fp_info_v0 { 6321 /* Sensor identification */ 6322 uint32_t vendor_id; 6323 uint32_t product_id; 6324 uint32_t model_id; 6325 uint32_t version; 6326 /* Image frame characteristics */ 6327 uint32_t frame_size; 6328 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 6329 uint16_t width; 6330 uint16_t height; 6331 uint16_t bpp; 6332 uint16_t errors; /* see FP_ERROR_ flags above */ 6333 } __ec_align4; 6334 6335 struct ec_response_fp_info { 6336 /* Sensor identification */ 6337 uint32_t vendor_id; 6338 uint32_t product_id; 6339 uint32_t model_id; 6340 uint32_t version; 6341 /* Image frame characteristics */ 6342 uint32_t frame_size; 6343 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 6344 uint16_t width; 6345 uint16_t height; 6346 uint16_t bpp; 6347 uint16_t errors; /* see FP_ERROR_ flags above */ 6348 /* Template/finger current information */ 6349 uint32_t template_size; /* max template size in bytes */ 6350 uint16_t template_max; /* maximum number of fingers/templates */ 6351 uint16_t template_valid; /* number of valid fingers/templates */ 6352 uint32_t template_dirty; /* bitmap of templates with MCU side changes */ 6353 uint32_t template_version; /* version of the template format */ 6354 } __ec_align4; 6355 6356 /* Get the last captured finger frame or a template content */ 6357 #define EC_CMD_FP_FRAME 0x0404 6358 6359 /* constants defining the 'offset' field which also contains the frame index */ 6360 #define FP_FRAME_INDEX_SHIFT 28 6361 /* Frame buffer where the captured image is stored */ 6362 #define FP_FRAME_INDEX_RAW_IMAGE 0 6363 /* First frame buffer holding a template */ 6364 #define FP_FRAME_INDEX_TEMPLATE 1 6365 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) 6366 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF 6367 6368 /* Version of the format of the encrypted templates. */ 6369 #define FP_TEMPLATE_FORMAT_VERSION 3 6370 6371 /* Constants for encryption parameters */ 6372 #define FP_CONTEXT_NONCE_BYTES 12 6373 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) 6374 #define FP_CONTEXT_TAG_BYTES 16 6375 #define FP_CONTEXT_SALT_BYTES 16 6376 #define FP_CONTEXT_TPM_BYTES 32 6377 6378 struct ec_fp_template_encryption_metadata { 6379 /* 6380 * Version of the structure format (N=3). 6381 */ 6382 uint16_t struct_version; 6383 /* Reserved bytes, set to 0. */ 6384 uint16_t reserved; 6385 /* 6386 * The salt is *only* ever used for key derivation. The nonce is unique, 6387 * a different one is used for every message. 6388 */ 6389 uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; 6390 uint8_t salt[FP_CONTEXT_SALT_BYTES]; 6391 uint8_t tag[FP_CONTEXT_TAG_BYTES]; 6392 }; 6393 6394 struct ec_params_fp_frame { 6395 /* 6396 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE 6397 * in the high nibble, and the real offset within the frame in 6398 * FP_FRAME_OFFSET_MASK. 6399 */ 6400 uint32_t offset; 6401 uint32_t size; 6402 } __ec_align4; 6403 6404 /* Load a template into the MCU */ 6405 #define EC_CMD_FP_TEMPLATE 0x0405 6406 6407 /* Flag in the 'size' field indicating that the full template has been sent */ 6408 #define FP_TEMPLATE_COMMIT 0x80000000 6409 6410 struct ec_params_fp_template { 6411 uint32_t offset; 6412 uint32_t size; 6413 uint8_t data[]; 6414 } __ec_align4; 6415 6416 /* Clear the current fingerprint user context and set a new one */ 6417 #define EC_CMD_FP_CONTEXT 0x0406 6418 6419 struct ec_params_fp_context { 6420 uint32_t userid[FP_CONTEXT_USERID_WORDS]; 6421 } __ec_align4; 6422 6423 #define EC_CMD_FP_STATS 0x0407 6424 6425 #define FPSTATS_CAPTURE_INV BIT(0) 6426 #define FPSTATS_MATCHING_INV BIT(1) 6427 6428 struct ec_response_fp_stats { 6429 uint32_t capture_time_us; 6430 uint32_t matching_time_us; 6431 uint32_t overall_time_us; 6432 struct { 6433 uint32_t lo; 6434 uint32_t hi; 6435 } overall_t0; 6436 uint8_t timestamps_invalid; 6437 int8_t template_matched; 6438 } __ec_align2; 6439 6440 #define EC_CMD_FP_SEED 0x0408 6441 struct ec_params_fp_seed { 6442 /* 6443 * Version of the structure format (N=3). 6444 */ 6445 uint16_t struct_version; 6446 /* Reserved bytes, set to 0. */ 6447 uint16_t reserved; 6448 /* Seed from the TPM. */ 6449 uint8_t seed[FP_CONTEXT_TPM_BYTES]; 6450 } __ec_align4; 6451 6452 #define EC_CMD_FP_ENC_STATUS 0x0409 6453 6454 /* FP TPM seed has been set or not */ 6455 #define FP_ENC_STATUS_SEED_SET BIT(0) 6456 6457 struct ec_response_fp_encryption_status { 6458 /* Used bits in encryption engine status */ 6459 uint32_t valid_flags; 6460 /* Encryption engine status */ 6461 uint32_t status; 6462 } __ec_align4; 6463 6464 /*****************************************************************************/ 6465 /* Touchpad MCU commands: range 0x0500-0x05FF */ 6466 6467 /* Perform touchpad self test */ 6468 #define EC_CMD_TP_SELF_TEST 0x0500 6469 6470 /* Get number of frame types, and the size of each type */ 6471 #define EC_CMD_TP_FRAME_INFO 0x0501 6472 6473 struct ec_response_tp_frame_info { 6474 uint32_t n_frames; 6475 uint32_t frame_sizes[]; 6476 } __ec_align4; 6477 6478 /* Create a snapshot of current frame readings */ 6479 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 6480 6481 /* Read the frame */ 6482 #define EC_CMD_TP_FRAME_GET 0x0503 6483 6484 struct ec_params_tp_frame_get { 6485 uint32_t frame_index; 6486 uint32_t offset; 6487 uint32_t size; 6488 } __ec_align4; 6489 6490 /*****************************************************************************/ 6491 /* EC-EC communication commands: range 0x0600-0x06FF */ 6492 6493 #define EC_COMM_TEXT_MAX 8 6494 6495 /* 6496 * Get battery static information, i.e. information that never changes, or 6497 * very infrequently. 6498 */ 6499 #define EC_CMD_BATTERY_GET_STATIC 0x0600 6500 6501 /** 6502 * struct ec_params_battery_static_info - Battery static info parameters 6503 * @index: Battery index. 6504 */ 6505 struct ec_params_battery_static_info { 6506 uint8_t index; 6507 } __ec_align_size1; 6508 6509 /** 6510 * struct ec_response_battery_static_info - Battery static info response 6511 * @design_capacity: Battery Design Capacity (mAh) 6512 * @design_voltage: Battery Design Voltage (mV) 6513 * @manufacturer: Battery Manufacturer String 6514 * @model: Battery Model Number String 6515 * @serial: Battery Serial Number String 6516 * @type: Battery Type String 6517 * @cycle_count: Battery Cycle Count 6518 */ 6519 struct ec_response_battery_static_info { 6520 uint16_t design_capacity; 6521 uint16_t design_voltage; 6522 char manufacturer[EC_COMM_TEXT_MAX]; 6523 char model[EC_COMM_TEXT_MAX]; 6524 char serial[EC_COMM_TEXT_MAX]; 6525 char type[EC_COMM_TEXT_MAX]; 6526 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ 6527 uint32_t cycle_count; 6528 } __ec_align4; 6529 6530 /* 6531 * Get battery dynamic information, i.e. information that is likely to change 6532 * every time it is read. 6533 */ 6534 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 6535 6536 /** 6537 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters 6538 * @index: Battery index. 6539 */ 6540 struct ec_params_battery_dynamic_info { 6541 uint8_t index; 6542 } __ec_align_size1; 6543 6544 /** 6545 * struct ec_response_battery_dynamic_info - Battery dynamic info response 6546 * @actual_voltage: Battery voltage (mV) 6547 * @actual_current: Battery current (mA); negative=discharging 6548 * @remaining_capacity: Remaining capacity (mAh) 6549 * @full_capacity: Capacity (mAh, might change occasionally) 6550 * @flags: Flags, see EC_BATT_FLAG_* 6551 * @desired_voltage: Charging voltage desired by battery (mV) 6552 * @desired_current: Charging current desired by battery (mA) 6553 */ 6554 struct ec_response_battery_dynamic_info { 6555 int16_t actual_voltage; 6556 int16_t actual_current; 6557 int16_t remaining_capacity; 6558 int16_t full_capacity; 6559 int16_t flags; 6560 int16_t desired_voltage; 6561 int16_t desired_current; 6562 } __ec_align2; 6563 6564 /* 6565 * Control charger chip. Used to control charger chip on the slave. 6566 */ 6567 #define EC_CMD_CHARGER_CONTROL 0x0602 6568 6569 /** 6570 * struct ec_params_charger_control - Charger control parameters 6571 * @max_current: Charger current (mA). Positive to allow base to draw up to 6572 * max_current and (possibly) charge battery, negative to request current 6573 * from base (OTG). 6574 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is 6575 * >= 0. 6576 * @allow_charging: Allow base battery charging (only makes sense if 6577 * max_current > 0). 6578 */ 6579 struct ec_params_charger_control { 6580 int16_t max_current; 6581 uint16_t otg_voltage; 6582 uint8_t allow_charging; 6583 } __ec_align_size1; 6584 6585 /* Get ACK from the USB-C SS muxes */ 6586 #define EC_CMD_USB_PD_MUX_ACK 0x0603 6587 6588 struct ec_params_usb_pd_mux_ack { 6589 uint8_t port; /* USB-C port number */ 6590 } __ec_align1; 6591 6592 /*****************************************************************************/ 6593 /* 6594 * Reserve a range of host commands for board-specific, experimental, or 6595 * special purpose features. These can be (re)used without updating this file. 6596 * 6597 * CAUTION: Don't go nuts with this. Shipping products should document ALL 6598 * their EC commands for easier development, testing, debugging, and support. 6599 * 6600 * All commands MUST be #defined to be 4-digit UPPER CASE hex values 6601 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 6602 * 6603 * In your experimental code, you may want to do something like this: 6604 * 6605 * #define EC_CMD_MAGIC_FOO 0x0000 6606 * #define EC_CMD_MAGIC_BAR 0x0001 6607 * #define EC_CMD_MAGIC_HEY 0x0002 6608 * 6609 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 6610 * EC_VER_MASK(0); 6611 * 6612 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 6613 * EC_VER_MASK(0); 6614 * 6615 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 6616 * EC_VER_MASK(0); 6617 */ 6618 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 6619 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 6620 6621 /* 6622 * Given the private host command offset, calculate the true private host 6623 * command value. 6624 */ 6625 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 6626 (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 6627 6628 /*****************************************************************************/ 6629 /* 6630 * Passthru commands 6631 * 6632 * Some platforms have sub-processors chained to each other. For example. 6633 * 6634 * AP <--> EC <--> PD MCU 6635 * 6636 * The top 2 bits of the command number are used to indicate which device the 6637 * command is intended for. Device 0 is always the device receiving the 6638 * command; other device mapping is board-specific. 6639 * 6640 * When a device receives a command to be passed to a sub-processor, it passes 6641 * it on with the device number set back to 0. This allows the sub-processor 6642 * to remain blissfully unaware of whether the command originated on the next 6643 * device up the chain, or was passed through from the AP. 6644 * 6645 * In the above example, if the AP wants to send command 0x0002 to the PD MCU, 6646 * AP sends command 0x4002 to the EC 6647 * EC sends command 0x0002 to the PD MCU 6648 * EC forwards PD MCU response back to the AP 6649 */ 6650 6651 /* Offset and max command number for sub-device n */ 6652 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n)) 6653 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff) 6654 6655 /*****************************************************************************/ 6656 /* 6657 * Deprecated constants. These constants have been renamed for clarity. The 6658 * meaning and size has not changed. Programs that use the old names should 6659 * switch to the new names soon, as the old names may not be carried forward 6660 * forever. 6661 */ 6662 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 6663 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 6664 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 6665 6666 6667 6668 #endif /* __CROS_EC_COMMANDS_H */ 6669