Searched refs:EXYNOS5_DRD_PHYREG0 (Results 1 – 1 of 1) sorted by relevance
104 #define EXYNOS5_DRD_PHYREG0 0x14 macro 845 writel(0x0, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in exynos5_usbdrd_phy_init() 988 writel(val | cmd, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in crport_handshake() 997 writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in crport_handshake() 1017 writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in crport_ctrl_write() 1024 writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in crport_ctrl_write()