| /linux/drivers/usb/gadget/udc/ |
| H A D | fsl_usb2_udc.h | 523 #define ep_index(EP) ((EP)->ep.desc->bEndpointAddress&0xF) argument
524 #define ep_maxpacket(EP) ((EP)->ep.maxpacket) argument
525 #define ep_is_in(EP) ( (ep_index(EP) == 0) ? (EP->udc->ep0_dir == \ argument
526 USB_DIR_IN) : ((EP)->ep.desc->bEndpointAddress \
532 #define get_pipe_by_ep(EP) (ep_index(EP) * 2 + ep_is_in(EP)) argument
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| H A D | fsl_qe_udc.h | 152 #define ep_index(EP) ((EP)->ep.desc->bEndpointAddress & 0xF) argument
153 #define ep_maxpacket(EP) ((EP)->ep.maxpacket) argument
154 #define ep_is_in(EP) ((ep_index(EP) == 0) ? (EP->udc->ep0_dir == \ argument
155 USB_DIR_IN) : ((EP)->ep.desc->bEndpointAddress \
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| /linux/Documentation/PCI/endpoint/ |
| H A D | pci-ntb-function.rst | 21 PCI Endpoint (EP) instances in such a way that transactions from one EP
22 controller are routed to the other EP controller. Once PCI NTB function
23 configures the SoC with multiple EP instances, HOST1 and HOST2 can
38 | | EP | | EP | |
43 | | | SoC With Multiple EP Instances | | |
132 bound to the EP device on the host side. Once the endpoint
289 EP CONTROLLER 1 EP CONTROLLER 2
292 EP controller 1) allocated in local memory. The HOST1 can access the config
293 region and scratchpad region (self scratchpad) using BAR0 of EP controller 1.
294 The peer host (HOST2 connected to EP controller 2) can also access this
[all …]
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| H A D | pci-vntb-function.rst | 14 PCI vNTB function only use one host and one endpoint(EP), use NTB
15 connect EP and PCI host
34 | | | PCI EP NTB |<------>| |
38 | PCI BUS | <-----> | PCI EP BUS | | Virtual PCI |
41 PCI RC PCI EP
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| H A D | pci-test-function.rst | 11 However with the addition of EP-core in linux kernel, it is possible
12 to configure a PCI controller that can operate in EP mode to work as
17 for other PCI endpoint devices (to use the EP framework).
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| H A D | pci-vntb-howto.rst | 11 be followed in the host side and EP side is given below. For the hardware
114 Binding pci-epf-vntb Device to EP Controller
151 lspci Output at EP Side / Virtual PCI bus
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| H A D | pci-test-howto.rst | 11 be followed in the host side and EP side is given below.
107 Binding pci-epf-test Device to EP Controller
226 Kselftest EP Doorbell
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| H A D | pci-ntb-howto.rst | 11 be followed in the host side and EP side is given below. For the hardware
108 Binding pci-epf-ntb Device to EP Controller
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | ti-pci.txt | 5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
65 work in host mode, EP mode DT node should be disabled and in order to PCI to
66 work in EP mode, host mode DT node should be disabled. Host mode and EP
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| /linux/drivers/pci/endpoint/ |
| H A D | Kconfig | 35 This enables the EP's MSI interrupt controller to function as a
36 doorbell. The RC can trigger doorbell in EP by writing data to a
37 dedicated BAR, which the EP maps to the controller's message address.
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| /linux/Documentation/usb/ |
| H A D | dwc3.rst | 37 - primary handler of the EP-interrupt
45 - threaded handler of the EP-interrupt
46 handles the remaining EP work which might sleep such as waiting
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| /linux/arch/arm/boot/dts/socionext/ |
| H A D | uniphier-pro5-epcore.dts | 3 * Device Tree Source for UniPhier Pro5 EP-CORE Board (Pro5-PCIe_EP-CORE)
14 model = "UniPhier Pro5 EP-CORE Board";
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| /linux/drivers/pci/controller/dwc/ |
| H A D | Kconfig | 132 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
133 determines which PCIe controller works in EP mode and which PCIe
144 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
145 determines which PCIe controller works in EP mode and which PCIe
239 Tegra194. This controller can work either as EP or RC. In order to
254 Tegra194. This controller can work either as EP or RC. In order to
266 can work either as RC or EP. In order to enable host-specific
281 This controller can work either as EP or RC. In order to enable
296 This controller can work either as EP or RC. In order to enable
468 Enables Endpoint (EP) support for the DesignWare core based PCIe
[all …]
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| /linux/arch/powerpc/platforms/44x/ |
| H A D | Kconfig | 14 select 440EP
44 select 440EP
90 select 440EP
159 select 440EP
238 config 440EP
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | omap-abe-twl6040.txt | 35 * EP
74 "Earphone Spk", "EP",
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| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm283x-rpi-usb-otg.dtsi | 7 * According to dwc2 the sum of all device EP
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-rock-5b-pcie-srns.dtso | 8 * other board running in EP mode.
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| H A D | rk3588-rock-5b-pcie-ep.dtso | 7 * RC mode and the other board running in EP mode, see also the device
|
| /linux/drivers/ata/pata_parport/ |
| H A D | Kconfig | 47 tristate "DataStor EP-2000 protocol"
50 This option enables support for the EP-2000 parallel port IDE
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| /linux/drivers/net/wireless/realtek/rtl818x/ |
| H A D | Kconfig | 56 Surecom EP-9428
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| /linux/Documentation/sound/designs/ |
| H A D | midi-2.0.rst | 129 EP Name: ProtoZOA
130 EP Product ID: ABCD12345678
294 UMP EP info and the corresponding sequencer clients as well.
570 legacy MIDI 1.0 rawmidi devices corresponding to both EP 0 and EP 1.
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| /linux/Documentation/driver-api/ |
| H A D | switchtec.rst | 97 NT EP BAR 2 will be dynamically configured as a Direct Window, and
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| /linux/arch/powerpc/boot/dts/ |
| H A D | warp.dts | 32 model = "PowerPC,440EP";
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| H A D | sam440ep.dts | 39 model = "PowerPC,440EP";
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| H A D | yosemite.dts | 36 model = "PowerPC,440EP";
|