| /linux/drivers/gpu/drm/nouveau/dispnv50/ |
| H A D | wndwca7e.c | 29 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, ENABLE, DISABLE)); in wndwca7e_image_clr() 57 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ISO, ENABLE, ENABLE)); in wndwca7e_image_set() 107 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ILUT, ENABLE, DISABLE)); in wndwca7e_ilut_clr() 129 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_ILUT, ENABLE, ENABLE)); in wndwca7e_ilut_set() 150 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_NOTIFIER, ENABLE, DISABLE)); in wndwca7e_ntfy_clr() 174 NVDEF(NVCA7E, SET_SURFACE_ADDRESS_LO_NOTIFIER, ENABLE, ENABLE)); in wndwca7e_ntfy_set()
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| H A D | headca7d.c | 101 NVVAL(NVCA7D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in headca7d_dither() 122 NVDEF(NVCA7D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in headca7d_curs_clr() 126 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_CURSOR, ENABLE, DISABLE)); in headca7d_curs_clr() 149 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_CURSOR, ENABLE, ENABLE)); in headca7d_curs_set() 152 NVDEF(NVCA7D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in headca7d_curs_set() 181 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_OLUT, ENABLE, DISABLE)); in headca7d_olut_clr() 204 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_OLUT, ENABLE, ENABLE)); in headca7d_olut_set()
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| H A D | head827d.c | 40 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in head827d_curs_clr() 59 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head827d_curs_set() 121 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, DISABLE)); in head827d_olut_clr() 138 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, ENABLE) | in head827d_olut_set()
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| H A D | crcca7d.c | 33 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_CRC, ENABLE, ENABLE)); in crcca7d_set_ctx() 36 NVDEF(NVCA7D, HEAD_SET_SURFACE_ADDRESS_LO_CRC, ENABLE, DISABLE)); in crcca7d_set_ctx()
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| H A D | base907c.c | 75 NVDEF(NV907C, SET_BASE_LUT_LO, ENABLE, DISABLE)); in base907c_xlut_clr() 78 NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, DISABLE)); in base907c_xlut_clr() 94 NVVAL(NV907C, SET_BASE_LUT_LO, ENABLE, asyw->xlut.i.enable) | in base907c_xlut_set() 100 NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, USE_CORE_LUT)); in base907c_xlut_set()
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| H A D | coreca7d.c | 34 NVDEF(NVCA7D, SET_SURFACE_ADDRESS_LO_NOTIFIER, ENABLE, ENABLE)); in coreca7d_update() 38 NVDEF(NVCA7D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE)); in coreca7d_update()
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| H A D | head917d.c | 41 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in head917d_dither() 89 NVDEF(NV917D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head917d_curs_set()
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| H A D | head907d.c | 88 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in head907d_dither() 163 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in head907d_curs_clr() 182 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head907d_curs_set() 257 NVDEF(NV907D, HEAD_SET_OUTPUT_LUT_LO, ENABLE, DISABLE)); in head907d_olut_clr() 274 NVDEF(NV907D, HEAD_SET_OUTPUT_LUT_LO, ENABLE, ENABLE) | in head907d_olut_set()
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| H A D | head507d.c | 59 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in head507d_dither() 133 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in head507d_curs_clr() 150 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in head507d_curs_set() 289 NVDEF(NV507D, HEAD_SET_BASE_LUT_LO, ENABLE, DISABLE)); in head507d_olut_clr() 304 NVDEF(NV507D, HEAD_SET_BASE_LUT_LO, ENABLE, ENABLE) | in head507d_olut_set()
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| H A D | headc37d.c | 96 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in headc37d_dither() 115 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | in headc37d_curs_clr() 133 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) | in headc37d_curs_set()
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| H A D | core507d.c | 46 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE)); in core507d_update() 93 NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE)); in core507d_read_caps()
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| H A D | base507c.c | 82 NVDEF(NV507C, SET_PROCESSING, USE_GAIN_OFS, ENABLE), in base507c_image_set() 128 NVDEF(NV507C, SET_BASE_LUT_LO, ENABLE, DISABLE)); in base507c_xlut_clr() 142 NVDEF(NV507C, SET_BASE_LUT_LO, ENABLE, USE_CORE_LUT)); in base507c_xlut_set()
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| /linux/arch/arm/boot/dts/cirrus/ |
| H A D | ep7211-edb7211.dts | 59 regulator-name = "BACKLIGHT ENABLE"; 67 regulator-name = "BACKLIGHT ENABLE"; 95 line-name = "LCD ENABLE";
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn32/ |
| H A D | dcn32_dccg.h | 80 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\ 81 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\ 82 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\ 83 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
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| /linux/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_connector.h | 71 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, DISABLE), 73 NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, ENABLE),
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/ |
| H A D | dcn31_dccg.h | 116 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\ 117 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\ 118 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\ 119 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/ |
| H A D | dcn314_dccg.h | 113 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\ 114 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\ 115 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\ 116 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 3, mask_sh),\
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx93-phyboard-segin-peb-wlbt-05.dtso | 88 MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e /* BT ENABLE */ 89 MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e /* WLAN ENABLE */
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6qdl-phytec-mira-peb-wlbt-05.dtsi | 63 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0xb0b1 /* BT ENABLE */ 82 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0xb0b1 /* WLAN ENABLE */
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| H A D | imx6ul-phytec-segin-peb-wlbt-05.dtsi | 28 MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3031 /* BT ENABLE */ 56 MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x3031 /* WLAN ENABLE */
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vega20_ih.c | 227 ENABLE, 1); in vega20_ih_doorbell_rptr() 231 ENABLE, 0); in vega20_ih_doorbell_rptr() 291 val = REG_SET_FIELD(val, IH_DOORBELL_RPTR, ENABLE, 1); in vega20_setup_retry_doorbell() 373 ENABLE, 1); in vega20_ih_irq_init() 375 WREG32_FIELD15(OSSSYS, 0, IH_RETRY_INT_CAM_CNTL, ENABLE, 1); in vega20_ih_irq_init()
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| /linux/drivers/gpu/drm/bridge/imx/ |
| H A D | imx8mp-hdmi-pai.c | 17 #define ENABLE BIT(0) macro 83 regmap_write(hdmi_pai->regmap, HTX_PAI_CTRL, ENABLE); in imx8mp_hdmi_pai_enable()
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| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn401/ |
| H A D | dcn401_dccg.h | 108 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 0, mask_sh),\ 109 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 1, mask_sh),\ 110 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 2, mask_sh),\ 111 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 3, mask_sh),\
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| /linux/drivers/net/ethernet/freescale/dpaa2/ |
| H A D | dpni.c | 268 *en = dpni_get_field(rsp_params->enabled, ENABLE); in dpni_is_enabled() 325 dpni_set_field(cmd_params->enable, ENABLE, en); in dpni_set_irq_enable() 368 *en = dpni_get_field(rsp_params->enabled, ENABLE); in dpni_get_irq_enable() 1024 dpni_set_field(cmd_params->enable, ENABLE, en); in dpni_set_multicast_promisc() 1060 *en = dpni_get_field(rsp_params->enabled, ENABLE); in dpni_get_multicast_promisc() 1087 dpni_set_field(cmd_params->enable, ENABLE, en); in dpni_set_unicast_promisc() 1123 *en = dpni_get_field(rsp_params->enabled, ENABLE); in dpni_get_unicast_promisc() 1255 dpni_set_field(cmd_params->en, ENABLE, en); in dpni_enable_vlan_filter() 1691 dpni_set_field(cmd_params->enable, ENABLE, taildrop->enable); in dpni_set_taildrop() 1745 taildrop->enable = dpni_get_field(rsp_params->enable, ENABLE); in dpni_get_taildrop()
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| /linux/drivers/net/wireless/ti/wl1251/ |
| H A D | reg.h | 48 #define ENABLE (REGISTERS_BASE + 0x5450) macro 277 #define REG_ENABLE_TX_RX (ENABLE)
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