Searched refs:DSCC_PPS_CONFIG7 (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| H A D | dcn401_dsc.c | 107 REG_GET(DSCC_PPS_CONFIG7, SLICE_BPG_OFFSET, &s->dsc_slice_bpg_offset); in dsc401_read_state()
285 REG_SET_2(DSCC_PPS_CONFIG7, 0, in dsc_write_to_registers()
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| H A D | dcn401_dsc.h | 219 uint32_t DSCC_PPS_CONFIG7; member
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| H A D | dcn20_dsc.h | 48 SRI(DSCC_PPS_CONFIG7, DSCC, id),\
481 uint32_t DSCC_PPS_CONFIG7; member
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| H A D | dcn20_dsc.c | 154 REG_GET(DSCC_PPS_CONFIG7, SLICE_BPG_OFFSET, &s->dsc_slice_bpg_offset); in dsc2_read_state()
671 REG_SET_2(DSCC_PPS_CONFIG7, 0, in dsc_write_to_registers()
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