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Searched refs:DSCC_PPS_CONFIG3 (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c101 REG_GET(DSCC_PPS_CONFIG3, SLICE_WIDTH, &s->dsc_slice_width); in dsc401_read_state()
103 REG_GET(DSCC_PPS_CONFIG3, SLICE_HEIGHT, &s->dsc_slice_height); in dsc401_read_state()
269 REG_SET_2(DSCC_PPS_CONFIG3, 0, in dsc_write_to_registers()
H A Ddcn401_dsc.h215 uint32_t DSCC_PPS_CONFIG3; member
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c148 REG_GET(DSCC_PPS_CONFIG3, SLICE_WIDTH, &s->dsc_slice_width); in dsc2_read_state()
150 REG_GET(DSCC_PPS_CONFIG3, SLICE_HEIGHT, &s->dsc_slice_height); in dsc2_read_state()
655 REG_SET_2(DSCC_PPS_CONFIG3, 0, in dsc_write_to_registers()
H A Ddcn20_dsc.h44 SRI(DSCC_PPS_CONFIG3, DSCC, id),\
477 uint32_t DSCC_PPS_CONFIG3; member