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Searched refs:DSCC_PPS_CONFIG1 (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c102 REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bits_per_pixel); in dsc401_read_state()
104 REG_GET(DSCC_PPS_CONFIG1, CHUNK_SIZE, &s->dsc_chunk_size); in dsc401_read_state()
256 REG_SET_7(DSCC_PPS_CONFIG1, 0, in dsc_write_to_registers()
H A Ddcn401_dsc.h213 uint32_t DSCC_PPS_CONFIG1; member
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c149 REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bits_per_pixel); in dsc2_read_state()
151 REG_GET(DSCC_PPS_CONFIG1, CHUNK_SIZE, &s->dsc_chunk_size); in dsc2_read_state()
642 REG_SET_7(DSCC_PPS_CONFIG1, 0, in dsc_write_to_registers()
H A Ddcn20_dsc.h42 SRI(DSCC_PPS_CONFIG1, DSCC, id),\
475 uint32_t DSCC_PPS_CONFIG1; member