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Searched refs:DRM_DEBUG (Results 1 – 25 of 113) sorted by relevance

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/linux/drivers/gpu/drm/radeon/
H A Dradeon_ucode.c33 DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes)); in radeon_ucode_print_common_hdr()
34 DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes)); in radeon_ucode_print_common_hdr()
35 DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major)); in radeon_ucode_print_common_hdr()
36 DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor)); in radeon_ucode_print_common_hdr()
37 DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major)); in radeon_ucode_print_common_hdr()
38 DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor)); in radeon_ucode_print_common_hdr()
39 DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version)); in radeon_ucode_print_common_hdr()
40 DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes)); in radeon_ucode_print_common_hdr()
41 DRM_DEBUG("ucode_array_offset_bytes: %u\n", in radeon_ucode_print_common_hdr()
43 DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32)); in radeon_ucode_print_common_hdr()
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H A Dr600.c1677 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); in r600_gpu_check_soft_reset()
2441 DRM_DEBUG("\n"); in r600_init_microcode()
3815 DRM_DEBUG("dpm thermal\n"); in r600_irq_set()
3820 DRM_DEBUG("r600_irq_set: sw int\n"); in r600_irq_set()
3826 DRM_DEBUG("r600_irq_set: sw int dma\n"); in r600_irq_set()
3832 DRM_DEBUG("r600_irq_set: vblank 0\n"); in r600_irq_set()
3837 DRM_DEBUG("r600_irq_set: vblank 1\n"); in r600_irq_set()
3841 DRM_DEBUG("r600_irq_set: hpd 1\n"); in r600_irq_set()
3845 DRM_DEBUG("r600_irq_set: hpd 2\n"); in r600_irq_set()
3849 DRM_DEBUG("r600_irq_set: hpd 3\n"); in r600_irq_set()
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H A Dcik.c1979 DRM_DEBUG("\n"); in cik_init_microcode()
4907 DRM_DEBUG("MC busy: 0x%08X, clearing.\n", reset_mask); in cik_gpu_check_soft_reset()
7062 DRM_DEBUG("cik_irq_set: sw int gfx\n"); in cik_irq_set()
7067 DRM_DEBUG("si_irq_set: sw int cp1\n"); in cik_irq_set()
7083 DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe); in cik_irq_set()
7101 DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe); in cik_irq_set()
7105 DRM_DEBUG("si_irq_set: sw int cp1 invalid me %d\n", ring->me); in cik_irq_set()
7110 DRM_DEBUG("si_irq_set: sw int cp2\n"); in cik_irq_set()
7126 DRM_DEBUG("si_irq_set: sw int cp2 invalid pipe %d\n", ring->pipe); in cik_irq_set()
7144 DRM_DEBUG("si_irq_set: sw int cp2 invalid pipe %d\n", ring->pipe); in cik_irq_set()
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H A Dradeon_i2c.c481 DRM_DEBUG("i2c write error 0x%08x\n", tmp); in r100_hw_i2c_xfer()
513 DRM_DEBUG("i2c read error 0x%08x\n", tmp); in r100_hw_i2c_xfer()
541 DRM_DEBUG("i2c write error 0x%08x\n", tmp); in r100_hw_i2c_xfer()
689 DRM_DEBUG("i2c write error 0x%08x\n", tmp); in r500_hw_i2c_xfer()
731 DRM_DEBUG("i2c read error 0x%08x\n", tmp); in r500_hw_i2c_xfer()
774 DRM_DEBUG("i2c write error 0x%08x\n", tmp); in r500_hw_i2c_xfer()
1056 DRM_DEBUG("val = 0x%02x\n", *val); in radeon_i2c_get_byte()
1058 DRM_DEBUG("i2c 0x%02x 0x%02x read failed\n", in radeon_i2c_get_byte()
1080 DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n", in radeon_i2c_put_byte()
H A Devergreen_hdmi.c336 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n", in dce4_hdmi_set_color_depth()
342 DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n", in dce4_hdmi_set_color_depth()
348 DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n", in dce4_hdmi_set_color_depth()
438 DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n", in evergreen_hdmi_enable()
H A Dr600_hdmi.c407 DRM_DEBUG("%s with %d channels, %d Hz sampling rate, %d bits per sample,\n", in r600_hdmi_update_audio_settings()
410 DRM_DEBUG("0x%02X IEC60958 status bits and 0x%02X category code\n", in r600_hdmi_update_audio_settings()
511 DRM_DEBUG("%sabling HDMI interface @ 0x%04X for encoder 0x%x\n", in r600_hdmi_enable()
/linux/drivers/gpu/drm/vc4/
H A Dvc4_validate_shaders.c205 DRM_DEBUG("direct TMU read used small immediate\n"); in check_tmu_write()
214 DRM_DEBUG("direct TMU load wasn't an add\n"); in check_tmu_write()
225 DRM_DEBUG("direct TMU load wasn't clamped\n"); in check_tmu_write()
231 DRM_DEBUG("direct TMU load wasn't clamped\n"); in check_tmu_write()
243 DRM_DEBUG("direct TMU load didn't add to a uniform\n"); in check_tmu_write()
251 DRM_DEBUG("uniform read in the same instruction as " in check_tmu_write()
258 DRM_DEBUG("TMU%d got too many parameters before dispatch\n", in check_tmu_write()
270 DRM_DEBUG("Texturing with undefined uniform address\n"); in check_tmu_write()
341 DRM_DEBUG("uniforms address change must be " in validate_uniform_address_write()
347 DRM_DEBUG("Uniform address reset must be an ADD.\n"); in validate_uniform_address_write()
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H A Dvc4_validate.c118 DRM_DEBUG("BO index %d greater than BO count %d\n", in vc4_use_bo()
126 DRM_DEBUG("Trying to use shader BO as something other than " in vc4_use_bo()
185 DRM_DEBUG("Surface dimensions (%d,%d) too large", in vc4_check_tex_size()
204 DRM_DEBUG("buffer tiling %d unsupported\n", tiling_format); in vc4_check_tex_size()
213 DRM_DEBUG("Overflow in %dx%d (%dx%d) fbo size (%d + %d > %zd)\n", in vc4_check_tex_size()
227 DRM_DEBUG("Bin CL must end with VC4_PACKET_FLUSH\n"); in validate_flush()
239 DRM_DEBUG("Duplicate VC4_PACKET_START_TILE_BINNING\n"); in validate_start_tile_binning()
245 DRM_DEBUG("missing VC4_PACKET_TILE_BINNING_MODE_CONFIG\n"); in validate_start_tile_binning()
256 DRM_DEBUG("Bin CL must end with " in validate_increment_semaphore()
277 DRM_DEBUG("shader state must precede primitives\n"); in validate_indexed_prim_list()
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H A Dvc4_render_cl.c393 DRM_DEBUG("surface offset %d > BO size %zd\n", in vc4_full_res_bounds_check()
400 DRM_DEBUG("MSAA tile %d, %d out of bounds " in vc4_full_res_bounds_check()
416 DRM_DEBUG("MSAA surface had nonzero flags/bits\n"); in vc4_rcl_msaa_surface_setup()
430 DRM_DEBUG("MSAA write must be 16b aligned.\n"); in vc4_rcl_msaa_surface_setup()
452 DRM_DEBUG("Extra flags set\n"); in vc4_rcl_surface_setup()
468 DRM_DEBUG("general zs write may not be a full-res.\n"); in vc4_rcl_surface_setup()
473 DRM_DEBUG("load/store general bits set with " in vc4_rcl_surface_setup()
488 DRM_DEBUG("Unknown bits in load/store: 0x%04x\n", in vc4_rcl_surface_setup()
494 DRM_DEBUG("Bad tiling format\n"); in vc4_rcl_surface_setup()
500 DRM_DEBUG("No color format should be set for ZS\n"); in vc4_rcl_surface_setup()
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H A Dvc4_perfmon.c160 DRM_DEBUG("Creating perfmon no VC4 V3D probed\n"); in vc4_perfmon_create_ioctl()
213 DRM_DEBUG("Destroying perfmon no VC4 V3D probed\n"); in vc4_perfmon_destroy_ioctl()
241 DRM_DEBUG("Getting perfmon no VC4 V3D probed\n"); in vc4_perfmon_get_values_ioctl()
H A Dvc4_gem.c85 DRM_DEBUG("VC4_GET_HANG_STATE with no VC4 V3D probed\n"); in vc4_get_hang_state_ioctl()
692 DRM_DEBUG("Rendering requires BOs to validate\n"); in vc4_cl_lookup_bos()
755 DRM_DEBUG("overflow in exec arguments\n"); in vc4_get_bcl()
1029 DRM_DEBUG("VC4_SUBMIT_CL with no VC4 V3D probed\n"); in vc4_submit_cl_ioctl()
1037 DRM_DEBUG("Unknown flags: 0x%02x\n", args->flags); in vc4_submit_cl_ioctl()
1042 DRM_DEBUG("Invalid pad: 0x%08x\n", args->pad2); in vc4_submit_cl_ioctl()
1237 DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); in vc4_gem_madvise_ioctl()
1245 DRM_DEBUG("madvise not supported on this BO\n"); in vc4_gem_madvise_ioctl()
1254 DRM_DEBUG("madvise not supported on imported BOs\n"); in vc4_gem_madvise_ioctl()
H A Dvc4_bo.c694 DRM_DEBUG("Attempting to export shader BO\n"); in vc4_prime_export()
737 DRM_DEBUG("mmapping of shader BOs for writing not allowed.\n"); in vc4_gem_object_mmap()
742 DRM_DEBUG("mmapping of %s BO not allowed\n", in vc4_gem_object_mmap()
821 DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); in vc4_mmap_bo_ioctl()
940 DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); in vc4_set_tiling_ioctl()
975 DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); in vc4_get_tiling_ioctl()
/linux/drivers/gpu/drm/display/
H A Ddrm_hdcp_helper.c26 DRM_DEBUG("\t%#02x, %#02x, %#02x, %#02x, %#02x\n", in drm_hdcp_print_ksv()
65 DRM_DEBUG("vrl: %d, Revoked KSVs: %d\n", vrl_idx++, in drm_hdcp_get_revoked_ksvs()
97 DRM_DEBUG("SRM ID: 0x%x, SRM Ver: 0x%x, SRM Gen No: 0x%x\n", in drm_hdcp_parse_hdcp1_srm()
124 DRM_DEBUG("Revoked KSV count is 0\n"); in drm_hdcp_parse_hdcp1_srm()
158 DRM_DEBUG("SRM ID: 0x%x, SRM Ver: 0x%x, SRM Gen No: 0x%x\n", in drm_hdcp_parse_hdcp2_srm()
187 DRM_DEBUG("Revoked KSV count is 0\n"); in drm_hdcp_parse_hdcp2_srm()
200 DRM_DEBUG("Revoked KSVs: %d\n", ksv_count); in drm_hdcp_parse_hdcp2_srm()
301 DRM_DEBUG("Revoked KSV is "); in drm_hdcp_check_ksvs_revoked()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v11_0.c94 DRM_DEBUG("\n"); in psp_v11_0_init_microcode()
453 DRM_DEBUG("training %s %s, cost %d @ %d ms\n", in psp_v11_0_memory_training_send_msg()
474 DRM_DEBUG("Memory training is not supported.\n"); in psp_v11_0_memory_training()
482 DRM_DEBUG("SOS is alive, skip memory training.\n"); in psp_v11_0_memory_training()
487 DRM_DEBUG("sys_cache[%08x,%08x,%08x,%08x] p2c_header[%08x,%08x,%08x,%08x]\n", in psp_v11_0_memory_training()
492 DRM_DEBUG("Short training depends on restore.\n"); in psp_v11_0_memory_training()
498 DRM_DEBUG("sys_cache[0] is invalid, restore depends on save.\n"); in psp_v11_0_memory_training()
505 DRM_DEBUG("sys_cache is invalid or out-of-date, need save training data to sys_cache.\n"); in psp_v11_0_memory_training()
511 DRM_DEBUG("p2c_header[0] is invalid, save depends on long training.\n"); in psp_v11_0_memory_training()
520 DRM_DEBUG("Memory training ops:%x.\n", ops); in psp_v11_0_memory_training()
H A Damdgpu_i2c.c289 DRM_DEBUG("i2c 0x%02x read failed\n", addr); in amdgpu_i2c_get_byte()
294 DRM_DEBUG("val = 0x%02x\n", *val); in amdgpu_i2c_get_byte()
316 DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n", addr, val); in amdgpu_i2c_put_byte()
H A Ddce_v8_0.c274 DRM_DEBUG("invalid hpd %d\n", hpd); in dce_v8_0_hpd_int_ack()
1576 DRM_DEBUG("%s: Disabling hdmi deep color for %d bpc.\n", in dce_v8_0_afmt_setmode()
1582 DRM_DEBUG("%s: Enabling hdmi deep color 30 for 10 bpc.\n", in dce_v8_0_afmt_setmode()
1588 DRM_DEBUG("%s: Enabling hdmi deep color 36 for 12 bpc.\n", in dce_v8_0_afmt_setmode()
1712 DRM_DEBUG("%sabling AFMT interface @ 0x%04X for encoder 0x%x\n", in dce_v8_0_afmt_enable()
2243 DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); in dce_v8_0_cursor_move_locked()
2910 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v8_0_set_crtc_vblank_interrupt_state()
2934 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v8_0_set_crtc_vblank_interrupt_state()
2961 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v8_0_set_crtc_vline_interrupt_state()
2985 DRM_DEBUG("invalid crtc %d\n", crtc); in dce_v8_0_set_crtc_vline_interrupt_state()
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/linux/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c752 DRM_DEBUG("CMD: Abnormal rcs cmd length! 0x%08X\n", cmd_header); in gen7_render_get_cmd_length_mask()
775 DRM_DEBUG("CMD: Abnormal bsd cmd length! 0x%08X\n", cmd_header); in gen7_bsd_get_cmd_length_mask()
788 DRM_DEBUG("CMD: Abnormal blt cmd length! 0x%08X\n", cmd_header); in gen7_blt_get_cmd_length_mask()
799 DRM_DEBUG("CMD: Abnormal blt cmd length! 0x%08X\n", cmd_header); in gen9_blt_get_cmd_length_mask()
1250 DRM_DEBUG("CMD: Rejected command: 0x%08X\n", *cmd); in check_cmd()
1270 DRM_DEBUG("CMD: Rejected register 0x%08X in command: 0x%08X (%s)\n", in check_cmd()
1281 DRM_DEBUG("CMD: Rejected LRM to masked register 0x%08X\n", in check_cmd()
1287 DRM_DEBUG("CMD: Rejected LRR to masked register 0x%08X\n", in check_cmd()
1295 DRM_DEBUG("CMD: Rejected LRI to masked register 0x%08X\n", in check_cmd()
1323 DRM_DEBUG("CMD: Rejected command 0x%08X, too short to check bitmask (%s)\n", in check_cmd()
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/linux/drivers/gpu/drm/meson/
H A Dmeson_overlay.c269 DRM_DEBUG("crtc_width %d crtc_height %d interlace %d\n", in meson_overlay_setup_scaler_params()
271 DRM_DEBUG("w_in %d h_in %d crop_top %d crop_left %d\n", in meson_overlay_setup_scaler_params()
273 DRM_DEBUG("video top %d left %d width %d height %d\n", in meson_overlay_setup_scaler_params()
282 DRM_DEBUG("ratio x 0x%x y 0x%x\n", ratio_x, ratio_y); in meson_overlay_setup_scaler_params()
287 DRM_DEBUG("vphase 0x%x skip %d\n", vphase, vphase_repeat_skip); in meson_overlay_setup_scaler_params()
332 DRM_DEBUG("vsc startp %d endp %d start_lines %d end_lines %d\n", in meson_overlay_setup_scaler_params()
340 DRM_DEBUG("afbc top %d (src %d) bottom %d (src %d)\n", in meson_overlay_setup_scaler_params()
375 DRM_DEBUG("hsc startp %d endp %d start_lines %d end_lines %d\n", in meson_overlay_setup_scaler_params()
386 DRM_DEBUG("afbc left %d right %d\n", afbc_left, afbc_right); in meson_overlay_setup_scaler_params()
660 DRM_DEBUG("plane 2 addr 0x%x stride %d height %d\n", in meson_overlay_atomic_update()
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H A Dmeson_osd_afbcd.c66 DRM_DEBUG("unsupported afbc format[%08x]\n", format); in meson_gxm_afbcd_pixel_fmt()
230 DRM_DEBUG("unsupported afbc format[%08x]\n", format); in meson_g12a_afbcd_pixel_fmt()
268 DRM_DEBUG("unsupported afbc format[%08x]\n", format); in meson_g12a_afbcd_fmt_to_blk_mode()
/linux/drivers/gpu/drm/stm/
H A Ddrv.c80 DRM_DEBUG("%s\n", __func__); in drv_load()
118 DRM_DEBUG("%s\n", __func__); in drv_unload()
192 DRM_DEBUG("%s\n", __func__); in stm_drm_platform_probe()
228 DRM_DEBUG("%s\n", __func__); in stm_drm_platform_remove()
/linux/drivers/gpu/drm/udl/
H A Dudl_main.c182 DRM_DEBUG("Waiting for completes and freeing all render urbs\n"); in udl_free_urb_list()
257 DRM_DEBUG("allocated %d %d byte urbs\n", udl->urbs.count, (int) size); in udl_alloc_urb_list()
338 DRM_DEBUG("\n"); in udl_init()
368 DRM_DEBUG("\n"); in udl_init()
/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_drv.c263 DRM_DEBUG("Failed to allocate incoming syncobj handles\n"); in panfrost_copy_in_sync()
271 DRM_DEBUG("Failed to copy in syncobj handles\n"); in panfrost_copy_in_sync()
413 DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); in panfrost_ioctl_mmap_bo()
443 DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); in panfrost_ioctl_get_bo_offset()
471 DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); in panfrost_ioctl_madvise()
602 DRM_DEBUG("Failed to allocate incoming BO sync ops array\n"); in panfrost_ioctl_sync_bo()
608 DRM_DEBUG("Failed to copy in BO sync ops\n"); in panfrost_ioctl_sync_bo()
644 DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); in panfrost_ioctl_query_bo_info()
/linux/drivers/gpu/drm/
H A Ddrm_drv.c180 DRM_DEBUG("\n"); in drm_minor_register()
206 DRM_DEBUG("new minor registered %d\n", minor->index); in drm_minor_register()
425 DRM_DEBUG("\n"); in drm_put_dev()
1194 DRM_DEBUG("\n"); in drm_stub_open()
1266 DRM_DEBUG("Initialized\n"); in drm_core_init()
/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_pipeline.c243 DRM_DEBUG(" %s: ID %d-0x%08lx.\n", in komeda_component_dump()
245 DRM_DEBUG(" max_active_inputs:%d, supported_inputs: 0x%08x.\n", in komeda_component_dump()
247 DRM_DEBUG(" max_active_outputs:%d, supported_outputs: 0x%08x.\n", in komeda_component_dump()
/linux/drivers/gpu/drm/virtio/
H A Dvirtgpu_plane.c251 DRM_DEBUG("nofb\n"); in virtio_gpu_primary_plane_update()
274 DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n", in virtio_gpu_primary_plane_update()
473 DRM_DEBUG("update, handle %d, pos +%d+%d, hot %d,%d\n", handle, in virtio_gpu_cursor_plane_update()
491 DRM_DEBUG("move +%d+%d\n", in virtio_gpu_cursor_plane_update()

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