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Searched refs:DP_MAX_LANE_COUNT (Results 1 – 11 of 11) sorted by relevance

/linux/include/drm/display/
H A Ddrm_dp_helper.h149 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in drm_dp_max_lane_count()
156 (dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP); in drm_dp_enhanced_frame_cap()
163 (dpcd[DP_MAX_LANE_COUNT] & DP_POST_LT_ADJ_REQ_SUPPORTED); in drm_dp_post_lt_adj_req_supported()
177 dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED; in drm_dp_tps3_supported()
H A Ddrm_dp.h116 #define DP_MAX_LANE_COUNT 0x002 macro
/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_dp.c90 outp->dp.link_nr = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in nouveau_dp_probe_dpcd()
327 if ( (outp->dp.dpcd[DP_MAX_LANE_COUNT] & 0x20) && in nouveau_dp_train_link()
/linux/drivers/gpu/drm/hisilicon/hibmc/dp/
H A Ddp_link.c334 dp->link.cap.lanes = dp->dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in hibmc_dp_update_caps()
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c186 ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); in analogix_dp_is_enhanced_mode_available()
549 drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); in analogix_dp_get_max_rx_lane_count()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_dp.c743 if (drm_dp_dpcd_readb(&amdgpu_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp) in amdgpu_atombios_dp_link_train()
/linux/drivers/gpu/drm/radeon/
H A Datombios_dp.c826 if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp) in radeon_dp_link_train()
/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c328 max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; in cdv_intel_dp_max_lane_count()
1076 (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) { in cdv_intel_dp_mode_set()
/linux/drivers/gpu/drm/bridge/
H A Dti-sn65dsi86.c1024 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LANE_COUNT, &data); in ti_sn_get_max_lanes()
/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c836 dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED) in zynqmp_dp_link_train_ce()
/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Ddisp.c1611 bool enhancedFraming = outp->dp.dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP; in nv50_sor_dp_watermark_sst()