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Searched refs:DPLL_VCO_ENABLE (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/gma500/
H A Doaktrail_crtc.c247 if ((temp & DPLL_VCO_ENABLE) == 0) { in oaktrail_crtc_dpms()
253 temp | DPLL_VCO_ENABLE, i); in oaktrail_crtc_dpms()
258 temp | DPLL_VCO_ENABLE, i); in oaktrail_crtc_dpms()
319 if ((temp & DPLL_VCO_ENABLE) != 0) { in oaktrail_crtc_dpms()
321 temp & ~DPLL_VCO_ENABLE, i); in oaktrail_crtc_dpms()
531 dpll |= DPLL_VCO_ENABLE; in oaktrail_crtc_mode_set()
555 dpll |= DPLL_VCO_ENABLE; in oaktrail_crtc_mode_set()
557 if (dpll & DPLL_VCO_ENABLE) { in oaktrail_crtc_mode_set()
560 REG_WRITE_WITH_AUX(map->dpll, dpll & ~DPLL_VCO_ENABLE, i); in oaktrail_crtc_mode_set()
H A Dgma_display.c224 if ((temp & DPLL_VCO_ENABLE) == 0) { in gma_crtc_dpms()
229 REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); in gma_crtc_dpms()
233 REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); in gma_crtc_dpms()
312 if ((temp & DPLL_VCO_ENABLE) != 0) { in gma_crtc_dpms()
313 REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE); in gma_crtc_dpms()
633 if (crtc_state->saveDPLL & DPLL_VCO_ENABLE) { in gma_crtc_restore()
635 crtc_state->saveDPLL & ~DPLL_VCO_ENABLE); in gma_crtc_restore()
H A Dpsb_intel_display.c210 dpll |= DPLL_VCO_ENABLE; in psb_intel_crtc_mode_set()
219 if (dpll & DPLL_VCO_ENABLE) { in psb_intel_crtc_mode_set()
221 REG_WRITE(map->dpll, dpll & ~DPLL_VCO_ENABLE); in psb_intel_crtc_mode_set()
H A Dcdv_intel_display.c759 dpll |= DPLL_VCO_ENABLE; in cdv_intel_crtc_mode_set()
769 (REG_READ(map->dpll) & ~DPLL_LOCK) | DPLL_VCO_ENABLE); in cdv_intel_crtc_mode_set()
H A Dpsb_intel_reg.h229 #define DPLL_VCO_ENABLE (1 << 31) macro
/linux/drivers/gpu/drm/i915/display/
H A Dintel_pch_refclk.c543 if (!(temp & DPLL_VCO_ENABLE)) in ilk_init_pch_refclk()
H A Dintel_display_power_well.c1412 (intel_de_read(display, DPLL(display, PIPE_B)) & DPLL_VCO_ENABLE) == 0) in assert_chv_phy_status()
H A Dintel_display.c8350 DPLL_VCO_ENABLE; in i830_enable_pipe()