Searched refs:DPLL_FPA01_P1_POST_DIV_SHIFT (Results 1 – 4 of 4) sorted by relevance
345 DPLL_FPA01_P1_POST_DIV_SHIFT); in psb_intel_crtc_clock_get()361 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in psb_intel_crtc_clock_get()
876 DPLL_FPA01_P1_POST_DIV_SHIFT); in cdv_intel_crtc_clock_get()896 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in cdv_intel_crtc_clock_get()
254 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro
8398 ((clock.p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT) | in i830_enable_pipe()