Searched refs:DPLLB_LVDS_P2_CLOCK_DIV_7 (Results 1 – 2 of 2) sorted by relevance
180 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in psb_intel_crtc_mode_set()
239 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro