Searched refs:DMA_CH_SR (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/net/ethernet/amd/xgbe/ |
| H A D | xgbe-drv.c | 396 dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR); in xgbe_isr_bh_work() 399 ti = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI); in xgbe_isr_bh_work() 400 ri = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI); in xgbe_isr_bh_work() 401 rbu = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RBU); in xgbe_isr_bh_work() 402 fbe = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE); in xgbe_isr_bh_work() 449 XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, TI, 0); in xgbe_isr_bh_work() 450 XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, RI, 0); in xgbe_isr_bh_work() 458 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr); in xgbe_isr_bh_work() 559 XGMAC_SET_BITS(dma_status, DMA_CH_SR, TI, 1); in xgbe_dma_isr() 560 XGMAC_SET_BITS(dma_status, DMA_CH_SR, RI, 1); in xgbe_dma_isr() [all …]
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| H A D | xgbe-common.h | 97 #define DMA_CH_SR 0x60 macro
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| H A D | xgbe-dev.c | 580 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, in xgbe_enable_dma_interrupts() 581 XGMAC_DMA_IOREAD(channel, DMA_CH_SR)); in xgbe_enable_dma_interrupts()
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| /linux/drivers/net/ethernet/synopsys/ |
| H A D | dwc-xlgmac-reg.h | 553 #define DMA_CH_SR 0x60 macro
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| H A D | dwc-xlgmac-net.c | 277 dma_ch_isr = readl(XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_isr() 324 writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_isr()
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| H A D | dwc-xlgmac-hw.c | 2455 dma_ch_isr = readl(XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_enable_dma_interrupts() 2456 writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_enable_dma_interrupts()
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