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Searched refs:DCFE_MEM_PWR_CTRL (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_ipp.c177 if (REG(DCFE_MEM_PWR_CTRL)) in dce_ipp_program_input_lut()
178 REG_SET(DCFE_MEM_PWR_CTRL, 0, DCP_LUT_MEM_PWR_DIS, 1); in dce_ipp_program_input_lut()
209 if (REG(DCFE_MEM_PWR_CTRL)) in dce_ipp_program_input_lut()
210 REG_SET(DCFE_MEM_PWR_CTRL, 0, DCP_LUT_MEM_PWR_DIS, 0); in dce_ipp_program_input_lut()
H A Ddce_transform.c227 if (REG(DCFE_MEM_PWR_CTRL)) { in program_multi_taps_filter()
228 power_ctl = REG_READ(DCFE_MEM_PWR_CTRL); in program_multi_taps_filter()
229 REG_SET(DCFE_MEM_PWR_CTRL, power_ctl, SCL_COEFF_MEM_PWR_DIS, 1); in program_multi_taps_filter()
261 if (REG(DCFE_MEM_PWR_CTRL)) in program_multi_taps_filter()
262 REG_WRITE(DCFE_MEM_PWR_CTRL, power_ctl); in program_multi_taps_filter()
1423 if (REG(DCFE_MEM_PWR_CTRL)) in program_pwl()
1424 REG_UPDATE(DCFE_MEM_PWR_CTRL, in program_pwl()
1477 if (REG(DCFE_MEM_PWR_CTRL)) in program_pwl()
1478 REG_UPDATE(DCFE_MEM_PWR_CTRL, in program_pwl()
1581 if (REG(DCFE_MEM_PWR_CTRL)) in dce110_opp_power_on_regamma_lut()
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H A Ddce_ipp.h58 SRI(DCFE_MEM_PWR_CTRL, CRTC, id)
62 SRI(DCFE_MEM_PWR_CTRL, DCFE, id)
108 IPP_SF(DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh)
253 uint32_t DCFE_MEM_PWR_CTRL; member
H A Ddce_transform.h103 SRI(DCFE_MEM_PWR_CTRL, CRTC, id), \
108 SRI(DCFE_MEM_PWR_CTRL, DCFE, id), \
265 XFM_SF(DCFE_MEM_PWR_CTRL, SCL_COEFF_MEM_PWR_DIS, mask_sh), \
267 XFM_SF(DCFE_MEM_PWR_CTRL, DCP_REGAMMA_MEM_PWR_DIS, mask_sh),\
268 XFM_SF(DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh),\
586 uint32_t DCFE_MEM_PWR_CTRL; member