Home
last modified time | relevance | path

Searched refs:CURSOR0_CONTROL (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/
H A Ddcn401_dpp_cm.c107 REG_UPDATE_3(CURSOR0_CONTROL, in dpp401_set_cursor_attributes()
140 REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en); in dpp401_set_cursor_position()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
H A Ddcn10_dpp.c410 REG_UPDATE(CURSOR0_CONTROL, in dpp1_cnv_setup()
422 REG_UPDATE_2(CURSOR0_CONTROL, in dpp1_set_cursor_attributes()
490 REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, cur_en); in dpp1_set_cursor_position()
537 REG_UPDATE(CURSOR0_CONTROL, CUR0_ENABLE, 0); in dpp_force_disable_cursor()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_ipp.h37 SRI(CURSOR0_CONTROL, CNVC_CUR, id), \
186 uint32_t CURSOR0_CONTROL; member
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn20/
H A Ddcn20_dpp.c251 REG_UPDATE(CURSOR0_CONTROL, in dpp2_cnv_setup()
354 REG_UPDATE_3(CURSOR0_CONTROL, in dpp2_set_cursor_attributes()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn201/
H A Ddcn201_dpp.c182 REG_UPDATE(CURSOR0_CONTROL, in dpp201_cnv_setup()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn30/
H A Ddcn30_dpp.c393 REG_UPDATE(CURSOR0_CONTROL, in dpp3_cnv_setup()
416 REG_UPDATE_3(CURSOR0_CONTROL, in dpp3_set_cursor_attributes()
H A Ddcn30_dpp.h139 SRI(CURSOR0_CONTROL, CNVC_CUR, id), \