Searched refs:CRTC3_REGISTER_OFFSET (Results 1 – 6 of 6) sorted by relevance
36 #define CRTC3_REGISTER_OFFSET (0x419c - 0x1b9c) macro
42 #define CRTC3_REGISTER_OFFSET (0x447c - 0x1b7c) macro
598 #define CRTC3_REGISTER_OFFSET (0x447c - 0x1b7c) //(0x111f0 - 0x6df0)/4 macro
61 CRTC3_REGISTER_OFFSET,79 CRTC3_REGISTER_OFFSET,2925 reg_block = CRTC3_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()2976 reg_block = CRTC3_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
72 CRTC3_REGISTER_OFFSET,91 CRTC3_REGISTER_OFFSET,2953 reg_block = CRTC3_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
61 CRTC3_REGISTER_OFFSET,2729 amdgpu_crtc->crtc_offset = CRTC3_REGISTER_OFFSET; in dce_v10_0_crtc_init()