| /linux/drivers/scsi/mpt3sas/ |
| H A D | mpt3sas_debug.h | 71 #define MPT_CHECK_LOGGING(IOC, CMD, BITS) \ argument 74 CMD; \ 81 #define dprintk(IOC, CMD) \ argument 82 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG) 84 #define dsgprintk(IOC, CMD) \ argument 85 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SG) 87 #define devtprintk(IOC, CMD) \ argument 88 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EVENTS) 90 #define dewtprintk(IOC, CMD) \ argument 91 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EVENT_WORK_TASK) [all …]
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| /linux/drivers/message/fusion/ |
| H A D | mptdebug.h | 69 #define MPT_CHECK_LOGGING(IOC, CMD, BITS) \ argument 72 CMD; \ 75 #define MPT_CHECK_LOGGING(IOC, CMD, BITS) \ argument 84 #define dprintk(IOC, CMD) \ argument 85 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG) 87 #define dsgprintk(IOC, CMD) \ argument 88 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SG) 90 #define devtprintk(IOC, CMD) \ argument 91 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EVENTS) 93 #define devtverboseprintk(IOC, CMD) \ argument [all …]
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| /linux/drivers/scsi/ |
| H A D | scsi_logging.h | 47 #define SCSI_CHECK_LOGGING(SHIFT, BITS, LEVEL, CMD) \ argument 51 CMD; \ 56 #define SCSI_CHECK_LOGGING(SHIFT, BITS, LEVEL, CMD) do { } while (0) argument 64 #define SCSI_LOG_ERROR_RECOVERY(LEVEL,CMD) \ argument 65 SCSI_CHECK_LOGGING(SCSI_LOG_ERROR_SHIFT, SCSI_LOG_ERROR_BITS, LEVEL,CMD); 66 #define SCSI_LOG_TIMEOUT(LEVEL,CMD) \ argument 67 SCSI_CHECK_LOGGING(SCSI_LOG_TIMEOUT_SHIFT, SCSI_LOG_TIMEOUT_BITS, LEVEL,CMD); 68 #define SCSI_LOG_SCAN_BUS(LEVEL,CMD) \ argument 69 SCSI_CHECK_LOGGING(SCSI_LOG_SCAN_SHIFT, SCSI_LOG_SCAN_BITS, LEVEL,CMD); 70 #define SCSI_LOG_MLQUEUE(LEVEL,CMD) \ argument [all …]
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_cmd_parser.c | 199 #define CMD(op, opm, f, lm, fl, ...) \ macro 221 CMD( MI_NOOP, SMI, F, 1, S ), 222 CMD( MI_USER_INTERRUPT, SMI, F, 1, R ), 223 CMD( MI_WAIT_FOR_EVENT, SMI, F, 1, R ), 224 CMD( MI_ARB_CHECK, SMI, F, 1, S ), 225 CMD( MI_REPORT_HEAD, SMI, F, 1, S ), 226 CMD( MI_SUSPEND_FLUSH, SMI, F, 1, S ), 227 CMD( MI_SEMAPHORE_MBOX, SMI, !F, 0xFF, R ), 228 CMD( MI_STORE_DWORD_INDEX, SMI, !F, 0xFF, R ), 229 CMD( MI_LOAD_REGISTER_IMM(1), SMI, !F, 0xFF, W, [all …]
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| /linux/drivers/ata/pata_parport/ |
| H A D | friq.c | 31 #define CMD(x) \ macro 52 CMD(r); in friq_read_regr() 64 CMD(r); in friq_write_regr() 75 CMD(regr); in friq_read_block_int() 85 CMD(regr + 0xc0); in friq_read_block_int() 95 CMD(regr + 0x80); in friq_read_block_int() 104 CMD(regr + 0x80); in friq_read_block_int() 113 CMD(regr + 0x80); in friq_read_block_int() 138 CMD(8); w2(5); in friq_write_block() 146 CMD(0xc8); w2(5); in friq_write_block() [all …]
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| /linux/drivers/mtd/chips/ |
| H A D | cfi_cmdset_0020.c | 263 status_OK = CMD(0x80); in do_read_onechip() 277 map_write (map, CMD(0xb0), cmd_addr); in do_read_onechip() 283 map_write(map, CMD(0x70), cmd_addr); in do_read_onechip() 294 map_write(map, CMD(0xd0), cmd_addr); in do_read_onechip() 296 map_write(map, CMD(0x70), cmd_addr); in do_read_onechip() 311 map_write(map, CMD(0xff), cmd_addr); in do_read_onechip() 325 map_write(map, CMD(0x70), cmd_addr); in do_read_onechip() 331 map_write(map, CMD(0xff), cmd_addr); in do_read_onechip() 374 map_write(map, CMD(0xd0), cmd_addr); in do_read_onechip() 375 map_write(map, CMD(0x70), cmd_addr); in do_read_onechip() [all …]
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| H A D | cfi_cmdset_0001.c | 289 map_write(map, CMD(0x60), 0); in fixup_LH28F640BF() 290 map_write(map, CMD(0x04), 0); in fixup_LH28F640BF() 827 map_word status, status_OK = CMD(0x80), status_PWS = CMD(0x01); in chip_ready() 878 map_write(map, CMD(0xB0), chip->in_progress_block_addr); in chip_ready() 885 map_write(map, CMD(0x70), chip->in_progress_block_addr); in chip_ready() 1086 map_write(map, CMD(0xd0), chip->in_progress_block_addr); in put_chip() 1087 map_write(map, CMD(0x70), chip->in_progress_block_addr); in put_chip() 1133 map_write(map, CMD(0xff), adr); in xip_enable() 1160 map_word status, OK = CMD(0x80); in xip_wait_for_operation() 1187 map_write(map, CMD(0xb0), adr); in xip_wait_for_operation() [all …]
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| H A D | cfi_cmdset_0002.c | 143 if (!map_word_bitsset(map, status, CMD(CFI_SR_DRB))) in cfi_check_err_status() 146 if (map_word_bitsset(map, status, CMD(0x3a))) { in cfi_check_err_status() 385 cfi->sector_erase_cmd = CMD(0x50); in fixup_sst39vf_rev_b() 563 map_write(map, CMD(0xF0), adr); in cfi_fixup_m29ew_erase_suspend() 838 map_word ready = CMD(CFI_SR_DRB); in chip_ready() 921 map_write(map, CMD(0xB0), chip->in_progress_block_addr); in get_chip() 1034 map_write(map, CMD(0xf0), adr); in xip_enable() 1060 map_word status, OK = CMD(0x80); in xip_udelay() 1079 map_write(map, CMD(0xb0), adr); in xip_udelay() 1097 if (!map_word_bitsset(map, status, CMD(0x40))) in xip_udelay() [all …]
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| /linux/include/linux/mtd/ |
| H A D | pfow.h | 106 map_write(map, CMD(cmd_code), map->pfow_base + PFOW_COMMAND_CODE); in send_pfow_command() 107 map_write(map, CMD(adr & ((1<<bits_per_chip) - 1)), in send_pfow_command() 109 map_write(map, CMD(adr>>bits_per_chip), in send_pfow_command() 112 map_write(map, CMD(len & ((1<<bits_per_chip) - 1)), in send_pfow_command() 114 map_write(map, CMD(len>>bits_per_chip), in send_pfow_command() 121 map_write(map, CMD(LPDDR_START_EXECUTION), in send_pfow_command()
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| /linux/tools/perf/tests/shell/ |
| H A D | python-use.sh | 15 CMD=$(cat <<EOF 23 CMD=$(cat <<EOF 30 echo -e "Testing 'import perf' with:\n$CMD" 32 if ! echo "$CMD" | $PYTHON | grep -q "success!"
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| /linux/sound/pci/ |
| H A D | atiixp.c | 492 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) in snd_atiixp_aclink_reset() 496 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); in snd_atiixp_aclink_reset() 497 atiixp_read(chip, CMD); in snd_atiixp_aclink_reset() 499 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); in snd_atiixp_aclink_reset() 502 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { in snd_atiixp_aclink_reset() 504 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, in snd_atiixp_aclink_reset() 506 atiixp_read(chip, CMD); in snd_atiixp_aclink_reset() 508 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); in snd_atiixp_aclink_reset() 516 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, in snd_atiixp_aclink_reset() 526 atiixp_update(chip, CMD, in snd_atiixp_aclink_down() [all …]
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| H A D | atiixp_modem.c | 468 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0)) in snd_atiixp_aclink_reset() 472 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET); in snd_atiixp_aclink_reset() 473 atiixp_read(chip, CMD); in snd_atiixp_aclink_reset() 475 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0); in snd_atiixp_aclink_reset() 478 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) { in snd_atiixp_aclink_reset() 480 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, in snd_atiixp_aclink_reset() 482 atiixp_read(chip, CMD); in snd_atiixp_aclink_reset() 484 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET); in snd_atiixp_aclink_reset() 492 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET, in snd_atiixp_aclink_reset() 502 atiixp_update(chip, CMD, in snd_atiixp_aclink_down() [all …]
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| /linux/drivers/mtd/lpddr/ |
| H A D | qinfo_probe.c | 71 map_write(map, CMD(LPDDR_INFO_QUERY), in lpddr_info_query() 73 map_write(map, CMD(adr & ((1 << bits_per_chip) - 1)), in lpddr_info_query() 75 map_write(map, CMD(adr >> bits_per_chip), in lpddr_info_query() 77 map_write(map, CMD(LPDDR_START_EXECUTION), in lpddr_info_query() 101 if (!map_word_equal(map, CMD('P'), pfow_val[0])) in lpddr_pfow_present() 104 if (!map_word_equal(map, CMD('F'), pfow_val[1])) in lpddr_pfow_present() 107 if (!map_word_equal(map, CMD('O'), pfow_val[2])) in lpddr_pfow_present() 110 if (!map_word_equal(map, CMD('W'), pfow_val[3])) in lpddr_pfow_present()
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| /linux/arch/arm/boot/dts/st/ |
| H A D | ste-dbx5x0-pinctrl.dtsi | 272 "GPIO24_AB2", /* CMD */ 292 "GPIO24_AB2", /* CMD */ 320 "GPIO24_AB2", /* CMD */ 333 "GPIO24_AB2", /* CMD */ 364 "GPIO210_AJ15", /* CMD */ 381 "GPIO210_AJ15", /* CMD */ 401 "GPIO210_AJ15", /* CMD */ 417 "GPIO210_AJ15", /* CMD */ 444 "GPIO129_B4", /* CMD */ 469 "GPIO129_B4", /* CMD */ [all …]
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| H A D | stm32f7-pinctrl.dtsi | 242 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1 CMD */ 260 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1 CMD */ 273 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1 CMD */ 284 <STM32_PINMUX('D', 7, AF11)>; /* SDMMC2 CMD */ 302 pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC2 CMD */ 315 <STM32_PINMUX('D', 7, ANALOG)>; /* SDMMC2 CMD */
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| /linux/drivers/firmware/meson/ |
| H A D | meson_sm.c | 30 #define CMD(d, s) { .index = (d), .smc_id = (s), } macro 44 CMD(SM_EFUSE_READ, 0x82000030), 45 CMD(SM_EFUSE_WRITE, 0x82000031), 46 CMD(SM_EFUSE_USER_MAX, 0x82000033), 47 CMD(SM_GET_CHIP_ID, 0x82000044), 48 CMD(SM_A1_PWRC_SET, 0x82000093), 49 CMD(SM_A1_PWRC_GET, 0x82000095),
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| /linux/scripts/ |
| H A D | get_dvb_firmware | 259 my $CMD = "\000\001\000\222\177\000"; 263 print $FW "$CMD\001$PAD"; 264 print $FW "$CMD\001$PAD"; 266 print $FW "$CMD\000$PAD"; 267 print $FW "$CMD\001$PAD"; 269 print $FW "$CMD\001$PAD"; 270 print $FW "$CMD\000$PAD"; 854 open(CMD, "md5sum \"$filename\"|"); 855 $testhash = <CMD>; 858 close CMD;
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| /linux/drivers/net/wireless/marvell/mwifiex/ |
| H A D | cmdevt.c | 130 mwifiex_dbg(adapter, CMD, in mwifiex_recycle_cmd_node() 149 mwifiex_dbg(priv->adapter, CMD, in mwifiex_cmd_host_cmd() 227 mwifiex_dbg(adapter, CMD, in mwifiex_dnld_cmd_to_fw() 315 mwifiex_dbg(adapter, CMD, in mwifiex_dnld_sleep_confirm_cmd() 438 mwifiex_dbg(adapter, CMD, in mwifiex_free_cmd_buffer() 453 mwifiex_dbg(adapter, CMD, in mwifiex_free_cmd_buffer() 725 mwifiex_dbg(adapter, CMD, in mwifiex_insert_cmd_to_pending_q() 866 mwifiex_dbg(adapter, CMD, in mwifiex_process_cmdresp() 1126 mwifiex_dbg(adapter, CMD, in mwifiex_check_ps_cond() 1187 mwifiex_dbg(adapter, CMD, in mwifiex_ret_802_11_hs_cfg() [all …]
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| /linux/drivers/staging/media/atomisp/pci/hive_isp_css_common/ |
| H A D | dma_global.h | 63 #define DMA_PACK_COMMAND(cmd) DMA_PACK(cmd, CMD) 87 hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \ 97 hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \ 117 hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \ 143 hive_dma_snd(dma_id, DMA_PACK(_DMA_V2_SET_CRUN_COMMAND, CMD)); \
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| /linux/Documentation/i2c/ |
| H A D | slave-testunit-backend.rst | 46 0x00, CMD, which test to trigger 53 # i2cset -y <bus_num> <testunit_address> <CMD> <DATAL> <DATAH> <DELAY> i 55 DELAY is a generic parameter which will delay the execution of the test in CMD. 76 * - CMD 100 * - CMD 127 * - CMD 157 * - CMD 195 * - CMD
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| /linux/tools/testing/selftests/cgroup/ |
| H A D | test_cpuset_prs.sh | 539 for CMD in $(echo $STATE | sed -e "s/:/ /g") 551 case $CMD in 553 CPUS=${CMD#?} 558 CPUS=${CMD#??} 562 C*) CPUS=${CMD#?} 566 P*) VAL=${CMD#?} 582 O*) VAL=${CMD#?} 588 *) echo "Unknown command: $CMD"
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| /linux/Documentation/hwmon/ |
| H A D | abituguru-datasheet.rst | 35 ports are holding for detection. We will refer to 0xE0 as CMD (command-port) 38 If DATA holds 0x00 or 0x08 and CMD holds 0x00 or 0xAC a uGuru could be 44 turned up which will hold 0x00 instead of 0xAC at the CMD port, thus we also 45 have to test CMD for two different values. On these uGuru's DATA will initially 46 hold 0x09 and will only hold 0x08 after reading CMD first, so CMD must be read 90 Next CMD _must_ be read and should hold 0xAC, usually CMD will hold 0xAC the 91 first read but sometimes it takes a while before CMD holds 0xAC and thus it 94 After reading CMD, DATA should hold 0x08 which means that the uGuru is ready 110 Once DATA holds 0x08 again write the sensor address to CMD. 119 DATA holds 0x01 read the byte from CMD. [all …]
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| /linux/drivers/scsi/fcoe/ |
| H A D | libfcoe.h | 11 #define LIBFCOE_CHECK_LOGGING(LEVEL, CMD) \ argument 15 CMD; \
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| H A D | fcoe.h | 36 #define FCOE_CHECK_LOGGING(LEVEL, CMD) \ argument 40 CMD; \
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| /linux/Documentation/virt/coco/ |
| H A D | tdx-guest.rst | 36 A subtype index is added at the end of this IOCTL CMD to uniquely identify the 42 a new IOCTL CMD will be created to handle it. To keep the IOCTL naming 43 consistent, a subtype index is added as part of the IOCTL CMD.
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