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Searched refs:CDP (Results 1 – 13 of 13) sorted by relevance

/linux/arch/arm/mach-omap2/
H A Ddma.c76 [CDP] = { 0x00d0, 0x60, OMAP_DMA_REG_32BIT },
/linux/include/linux/
H A Domap-dma.h163 CDP, CNDP, CCDN, enumerator
/linux/arch/arm/nwfpe/
H A Dentry.S138 tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8960-cdp.dts8 model = "Qualcomm MSM8960 CDP";
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/
H A Dgsp.h51 char CDP[6]; member
/linux/drivers/mtd/maps/
H A DKconfig140 tristate "CFI Flash device mapped on AMD SC520 CDP"
143 The SC520 CDP board has two banks of CFI-compliant chips and one
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/
H A Dgsp.h64 char CDP[6]; member
/linux/Documentation/filesystems/
H A Dresctrl.rst23 CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2"
55 L2 and L3 CDP are controlled separately.
186 no longer available for general (CPU) cache allocation. When CDP is
218 When CDP is enabled "io_alloc_cbm" associated with the CDP_DATA and CDP_CODE
918 With CDP disabled the L3 schemata format is::
922 L3 schemata file details (CDP enabled via mount option to resctrl)
924 When CDP is enabled L3 control is split into two separate resources
932 CDP is supported at L2 using the 'cdpl2' mount option. The schemata
/linux/drivers/dma/ti/
H A Domap-dma.c441 omap_dma_chan_write(c, CDP, cdp); in omap_dma_start()
450 omap_dma_chan_write(c, CDP, 0); in omap_dma_start()
/linux/drivers/gpu/nova-core/gsp/fw/r570_144/
H A Dbindings.rs356 pub CDP: [ffi::c_char; 6usize], field
/linux/drivers/eisa/
H A Deisa.ids71 AIR0701 "AIR 54CDP PCI/EISA System Board"
72 AIR0702 "AIR 54CDP PCI/EISA Dual-Processors System Board"
/linux/Documentation/ABI/testing/
H A Dsysfs-class-power677 "Unknown", "SDP", "DCP", "CDP", "ACA", "C", "PD",
/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv397 …0x10, 2:1, ecx, 2, cdp_l3 , L3/L2_CAT CDP (Code and Data Prioritiz…