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Searched refs:CACHE_MODE_0_GEN7 (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/i915/gvt/ !
H A Dmmio_context.c81 {RCS0, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */
113 {RCS0, CACHE_MODE_0_GEN7, 0xffff, true}, /* 0x7000 */
H A Dhandlers.c2271 MMIO_DFH(CACHE_MODE_0_GEN7, D_ALL, F_MODE_MASK | F_CMD_ACCESS, in init_generic_mmio_info()
/linux/drivers/gpu/drm/i915/gt/ !
H A Dintel_workarounds.c352 wa_masked_dis(wal, CACHE_MODE_0_GEN7, RC_OP_FLUSH_ENABLE); in gen7_ctx_workarounds_init()
394 wa_masked_dis(wal, CACHE_MODE_0_GEN7, HIZ_RAW_STALL_OPT_DISABLE); in gen8_ctx_workarounds_init()
696 wa_masked_en(wal, CACHE_MODE_0_GEN7, in icl_ctx_workarounds_init()
2515 CACHE_MODE_0_GEN7, in rcs_engine_wa_init()
2556 CACHE_MODE_0_GEN7, in rcs_engine_wa_init()
H A Dgen7_renderclear.c400 batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7)); in emit_batch()
H A Dintel_gt_regs.h443 #define CACHE_MODE_0_GEN7 _MMIO(0x7000) /* IVB+ */
442 #define CACHE_MODE_0_GEN7 global() macro