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Searched refs:BA0_CLKCR1 (Results 1 – 3 of 3) sorted by relevance

/linux/sound/pci/
H A Dcs4281.c205 #define BA0_CLKCR1 0x0400 /* Clock Control Register 1 */ macro
1273 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs4281_free()
1379 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs4281_chip_init()
1409 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_DLLP); in snd_cs4281_chip_init()
1411 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_SWCE | BA0_CLKCR1_DLLP); in snd_cs4281_chip_init()
1422 if (snd_cs4281_peekBA0(chip, BA0_CLKCR1) & BA0_CLKCR1_DLLRDY) in snd_cs4281_chip_init()
1913 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); in cs4281_suspend()
1915 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK); in cs4281_suspend()
1932 snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0); in cs4281_suspend()
1937 ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1); in cs4281_suspend()
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/linux/sound/pci/cs46xx/
H A Dcs46xx_lib.c619 tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1); in snd_cs46xx_clear_serial_FIFOs()
621 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp | CLKCR1_SWCE); in snd_cs46xx_clear_serial_FIFOs()
645 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); in snd_cs46xx_clear_serial_FIFOs()
663 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); in snd_cs46xx_clear_serial_FIFOs()
2840 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs46xx_hw_stop()
2846 tmp = snd_cs46xx_peekBA0(chip, BA0_CLKCR1) & ~CLKCR1_SWCE; in snd_cs46xx_hw_stop()
2847 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, tmp); in snd_cs46xx_hw_stop()
2897 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, 0); in snd_cs46xx_chip_init()
2963 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP); in snd_cs46xx_chip_init()
2973 snd_cs46xx_pokeBA0(chip, BA0_CLKCR1, CLKCR1_PLLP | CLKCR1_SWCE); in snd_cs46xx_chip_init()
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H A Dcs46xx.h52 #define BA0_CLKCR1 0x00000400 macro