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Searched refs:AST_IO_VGACRI (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/ast/
H A Dast_mode.c166 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8c, (u8)((color_index & 0x0f) << 4)); in ast_set_vbios_color_reg()
168 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); in ast_set_vbios_color_reg()
171 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); in ast_set_vbios_color_reg()
172 ast_set_index_reg(ast, AST_IO_VGACRI, 0x92, format->cpp[0] * 8); in ast_set_vbios_color_reg()
185 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8d, refresh_rate_index & 0xff); in ast_set_vbios_mode_reg()
186 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8e, mode_id & 0xff); in ast_set_vbios_mode_reg()
188 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); in ast_set_vbios_mode_reg()
191 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); in ast_set_vbios_mode_reg()
192 ast_set_index_reg(ast, AST_IO_VGACRI, 0x93, adjusted_mode->clock / 1000); in ast_set_vbios_mode_reg()
193 ast_set_index_reg(ast, AST_IO_VGACRI, 0x94, adjusted_mode->crtc_hdisplay); in ast_set_vbios_mode_reg()
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H A Dast_dp.c73 if (!ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xDF, AST_IO_VGACRDF_HPD)) in ast_astdp_is_connected()
79 if (!ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xDC, AST_IO_VGACRDC_LINK_SUCCESS)) in ast_astdp_is_connected()
101 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xe5, (u8)~AST_IO_VGACRE5_EDID_READ_DONE, 0x00); in ast_astdp_read_edid_block()
119 ast_set_index_reg(ast, AST_IO_VGACRI, 0xe4, vgacre4); in ast_astdp_read_edid_block()
140 vgacrd7 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd7); in ast_astdp_read_edid_block()
142 vgacrd6 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd6); in ast_astdp_read_edid_block()
152 ediddata[0] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd8); in ast_astdp_read_edid_block()
153 ediddata[1] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd9); in ast_astdp_read_edid_block()
154 ediddata[2] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xda); in ast_astdp_read_edid_block()
155 ediddata[3] = ast_get_index_reg(ast, AST_IO_VGACRI, 0xdb); in ast_astdp_read_edid_block()
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H A Dast_2000.c49 ast_set_index_reg(ast, AST_IO_VGACRI, i, 0x00); in ast_2000_set_def_ext_reg()
54 ast_set_index_reg_mask(ast, AST_IO_VGACRI, index, 0x00, *ext_reg_info); in ast_2000_set_def_ext_reg()
63 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x8c, 0x00, 0x01); in ast_2000_set_def_ext_reg()
64 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x00, 0x00); in ast_2000_set_def_ext_reg()
68 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg); in ast_2000_set_def_ext_reg()
105 j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2000()
134 j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2000()
147 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); in ast_2000_post()
206 vgacra3 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xff); in ast_2000_detect_tx_chip()
H A Dast_ddc.c49 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0xf1, ujcrb7); in ast_ddc_algo_bit_data_setsda()
50 jtemp = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x04); in ast_ddc_algo_bit_data_setsda()
65 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0xf4, ujcrb7); in ast_ddc_algo_bit_data_setscl()
66 jtemp = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x01); in ast_ddc_algo_bit_data_setscl()
102 val = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x20) >> 5) & 0x01; in ast_ddc_algo_bit_data_getsda()
104 val2 = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x20) >> 5) & 0x01; in ast_ddc_algo_bit_data_getsda()
109 val = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x20) >> 5) & 0x01; in ast_ddc_algo_bit_data_getsda()
124 val = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x10) >> 4) & 0x01; in ast_ddc_algo_bit_data_getscl()
126 val2 = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x10) >> 4) & 0x01; in ast_ddc_algo_bit_data_getscl()
131 val = (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x10) >> 4) & 0x01; in ast_ddc_algo_bit_data_getscl()
H A Dast_dp501.c39 sendack = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0xff); in send_ack()
41 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0x00, sendack); in send_ack()
47 sendack = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0xff); in send_nack()
49 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, 0x00, sendack); in send_nack()
57 waitack = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd2, 0xff); in wait_ack()
73 waitack = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd2, 0xff); in wait_nack()
86 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, ~0x40, 0x40); in set_cmd_trigger()
91 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9b, ~0x40, 0x00); in clear_cmd_trigger()
100 waitready = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd2, 0xff);
118 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x9a, 0x00, data); in ast_write_cmd()
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H A Dast_2100.c307 j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2100()
373 j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2100()
386 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); in ast_2100_post()
400 u8 vgacrd0 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd0); in __ast_2100_detect_wsxga_p()
416 vgacrd1 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd1); in __ast_2100_detect_wuxga()
H A Dast_mm.c41 vgacraa = ast_get_index_reg(ast, AST_IO_VGACRI, 0xaa); in ast_get_vram_size()
57 vgacr99 = ast_get_index_reg(ast, AST_IO_VGACRI, 0x99); in ast_get_vram_size()
H A Dast_drv.c145 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, AST_IO_VGACRA1_MMIO_ENABLED); in ast_enable_mmio_release()
152 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, in ast_enable_mmio()
161 __ast_write8_i(ioregs, AST_IO_VGACRI, 0x80, AST_IO_VGACR80_PASSWORD); in ast_open_key()
192 vgacrd0 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd0); in ast_detect_chip()
193 vgacrd1 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd1); in ast_detect_chip()
H A Dast_2300.c52 ast_set_index_reg(ast, AST_IO_VGACRI, i, 0x00); in ast_2300_set_def_ext_reg()
57 ast_set_index_reg_mask(ast, AST_IO_VGACRI, index, 0x00, *ext_reg_info); in ast_2300_set_def_ext_reg()
66 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x8c, 0x00, 0x01); in ast_2300_set_def_ext_reg()
67 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x00, 0x00); in ast_2300_set_def_ext_reg()
72 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg); in ast_2300_set_def_ext_reg()
1246 reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2300()
1315 reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2300()
1329 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); in ast_2300_post()
1351 vgacrd1 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, in ast_2300_detect_tx_chip()
H A Dast_2500.c505 reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2500()
553 reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2500()
566 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); in ast_2500_post()
H A Dast_reg.h31 #define AST_IO_VGACRI (0x54) macro