Searched refs:ASIC_REV_5752 (Results 1 – 2 of 2) sorted by relevance
3503 if (tg3_asic_rev(tp) != ASIC_REV_5752 && in tg3_nvram_write_block_buffered()9176 if (tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_chip_reset()9774 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_setup_rxbd_thresholds()10529 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_reset_hw()15102 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_nvram_init()16218 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_detect_asic_rev()16759 else if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_get_invariants()17021 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_get_invariants()
179 #define ASIC_REV_5752 0x06 macro