Searched refs:AMD_MDB_TLP_IR_ENABLE_MISC (Results 1 – 1 of 1) sorted by relevance
25 #define AMD_MDB_TLP_IR_ENABLE_MISC 0x4C8 macro 105 * Writing '1' to a bit in AMD_MDB_TLP_IR_ENABLE_MISC enables that in amd_mdb_intx_irq_unmask() 108 writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_ENABLE_MISC); in amd_mdb_intx_irq_unmask() 197 writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_ENABLE_MISC); in amd_mdb_event_irq_unmask() 265 pcie->slcr + AMD_MDB_TLP_IR_ENABLE_MISC); in amd_mdb_pcie_init_port()