Searched refs:AMDGPU_GMC_HOLE_MASK (Results 1 – 8 of 8) sorted by relevance
95 seq64_addr = amdgpu_seq64_get_va_base(adev) & AMDGPU_GMC_HOLE_MASK; in amdgpu_seq64_map()
48 #define AMDGPU_GMC_HOLE_MASK (adev->vm_manager.max_level == 4 ?\ macro
77 wptr &= AMDGPU_GMC_HOLE_MASK; in mes_userq_create_wptr_mapping()
382 addr &= AMDGPU_GMC_HOLE_MASK; in amdgpu_userq_fence_read_wptr()
1504 uint64_t csa_addr = amdgpu_csa_vaddr(adev) & AMDGPU_GMC_HOLE_MASK; in amdgpu_driver_open_kms()1579 uint64_t csa_addr = amdgpu_csa_vaddr(adev) & AMDGPU_GMC_HOLE_MASK; in amdgpu_driver_postclose_kms()
860 args->va_address &= AMDGPU_GMC_HOLE_MASK; in amdgpu_gem_va_ioctl()
242 user_addr = (addr & AMDGPU_GMC_HOLE_MASK) >> AMDGPU_GPU_PAGE_SHIFT; in amdgpu_userq_input_va_validate()
1038 va_start = ib->gpu_addr & AMDGPU_GMC_HOLE_MASK; in amdgpu_cs_patch_ibs()