Searched refs:AM65_CPSW_PN_REG_CTL (Results 1 – 3 of 3) sorted by relevance
50 #define AM65_CPSW_PN_REG_CTL 0x004 macro 56 #define AM65_CPSW_PN_REG_CTL 0x004 macro 67 /* AM65_CPSW_PN_REG_CTL register fields */136 #define AM65_CPSW_PN_REG_CTL 0x004 macro 152 /* AM65_CPSW_PN_REG_CTL register fields */
361 val = readl(port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_iet_common_enable() 391 val = readl(port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_iet_commit_preemptible_tcs() 460 val = readl(port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_port_est_enable() 466 writel(val, port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_port_est_enable()
759 val = readl(port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_port_iet_rx_enable() 765 writel(val, port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_port_iet_rx_enable() 795 port_ctrl = readl(port->port_base + AM65_CPSW_PN_REG_CTL); in am65_cpsw_get_mm()