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Searched refs:AF10 (Results 1 – 11 of 11) sorted by relevance

/linux/arch/arm64/boot/dts/st/
H A Dstm32mp25-pinctrl.dtsi11 pinmux = <STM32_PINMUX('F', 0, AF10)>; /* ETH_MDC */
17 pinmux = <STM32_PINMUX('F', 2, AF10)>; /* ETH_MDIO */
33 pinmux = <STM32_PINMUX('A', 15, AF10)>, /* ETH_RGMII_TXD0 */
34 <STM32_PINMUX('C', 1, AF10)>, /* ETH_RGMII_TXD1 */
35 <STM32_PINMUX('H', 10, AF10)>, /* ETH_RGMII_TXD2 */
36 <STM32_PINMUX('H', 11, AF10)>, /* ETH_RGMII_TXD3 */
37 <STM32_PINMUX('A', 13, AF10)>; /* ETH_RGMII_TX_CTL */
44 pinmux = <STM32_PINMUX('H', 9, AF10)>, /* ETH_RGMII_CLK125 */
51 pinmux = <STM32_PINMUX('F', 1, AF10)>, /* ETH_RGMII_RXD0 */
52 <STM32_PINMUX('C', 2, AF10)>, /* ETH_RGMII_RXD1 */
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32f7-pinctrl.dtsi186 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
187 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
188 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
189 <STM32_PINMUX('A', 5, AF10)>, /* OTG_HS_ULPI_CK */
190 <STM32_PINMUX('A', 3, AF10)>, /* OTG_HS_ULPI_D0 */
191 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
192 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
193 <STM32_PINMUX('B', 10, AF10)>, /* OTG_HS_ULPI_D3 */
194 <STM32_PINMUX('B', 11, AF10)>, /* OTG_HS_ULPI_D4 */
195 <STM32_PINMUX('B', 12, AF10)>, /* OTG_HS_ULPI_D5 */
[all …]
H A Dstm32mp151a-prtt1c.dts173 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
180 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
183 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
197 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
198 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
199 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
232 pinmux = <STM32_PINMUX('D', 1, AF10)>, /* SDMMC3_D0 */
233 <STM32_PINMUX('D', 4, AF10)>, /* SDMMC3_D1 */
234 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
235 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
[all …]
H A Dstm32h7-pinctrl.dtsi283 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */
284 <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */
285 <STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */
286 <STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */
287 <STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */
288 <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */
289 <STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */
290 <STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */
291 <STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */
292 <STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */
[all …]
H A Dstm32f4-pinctrl.dtsi193 pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
194 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
195 <STM32_PINMUX('A', 12, AF10)>; /* OTG_FS_DP */
215 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT*/
216 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
217 <STM32_PINMUX('C', 0, AF10)>, /* OTG_HS_ULPI_STP */
218 <STM32_PINMUX('A', 5, AF10)>, /* OTG_HS_ULPI_CK */
219 <STM32_PINMUX('A', 3, AF10)>, /* OTG_HS_ULPI_D0 */
220 <STM32_PINMUX('B', 0, AF10)>, /* OTG_HS_ULPI_D1 */
221 <STM32_PINMUX('B', 1, AF10)>, /* OTG_HS_ULPI_D2 */
[all …]
H A Dstm32mp13-pinctrl.dtsi73 <STM32_PINMUX('E', 5, AF10)>, /* ETH_RGMII_TXD3 */
89 <STM32_PINMUX('D', 7, AF10)>; /* ETH_RGMII_RX_CLK */
137 <STM32_PINMUX('C', 1, AF10)>; /* ETH_RMII_CRS_DV */
161 <STM32_PINMUX('G', 11, AF10)>, /* ETH_RGMII_TXD1 */
162 <STM32_PINMUX('G', 1, AF10)>, /* ETH_RGMII_TXD2 */
165 <STM32_PINMUX('G', 3, AF10)>, /* ETH_RGMII_GTX_CLK */
167 <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */
175 <STM32_PINMUX('E', 2, AF10)>, /* ETH_RGMII_RXD1 */
188 <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */
214 <STM32_PINMUX('G', 11, AF10)>, /* ETH_RMII_TXD1 */
[all …]
H A Dstm32mp15-pinctrl.dtsi1762 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1763 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
1808 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1825 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1849 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1850 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1851 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1852 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1872 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1873 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
[all …]
H A Dstm32mp157c-ultra-fly-sbc.dts600 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
644 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
645 <STM32_PINMUX('D',11, AF10)>, /* SAI2_SD_A */
646 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
647 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
723 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
753 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
774 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
H A Dstm32mp15x-mecio1-io.dtsi339 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
340 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
/linux/include/dt-bindings/pinctrl/
H A Dstm32-pinfunc.h22 #define AF10 0xb macro
/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g6.c1288 #define AF10 207 macro
1289 SIG_EXPR_LIST_DECL_SEMG(AF10, SPI1DQ3, QSPI1, SPI1, SIG_DESC_SET(SCU438, 15));
1290 SIG_EXPR_LIST_DECL_SEMG(AF10, RXD13, UART13G1, UART13,
1292 PIN_DECL_2(AF10, GPIOZ7, SPI1DQ3, RXD13);
1294 GROUP_DECL(QSPI1, AB11, AC11, AA11, AD11, AF10);
1297 GROUP_DECL(UART13G1, AD11, AF10);
1742 ASPEED_PINCTRL_PIN(AF10),
2579 ASPEED_PULL_DOWN_PINCONF(AF10, SCU638, 15),